Patents by Inventor Kazuyuki Okada

Kazuyuki Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070183232
    Abstract: In a semiconductor memory device employing shared type sense amplifiers, entry is made to the test mode, and transfer gates, pre-charge circuits, and sense amplifiers used in the shared type sense amplifiers are controlled individually. An object bit line is placed in the high impedance state. The opposing sense amplifier is left active to place an adjacent bit line in the low impedance state. If there is a bit-line to bit-line short, data on the object bit line in the high impedance state is inverted from the adjacent bit line in the low impedance state. The bit-line to bit-line short can be detected by reading the inverted data.
    Type: Application
    Filed: December 26, 2006
    Publication date: August 9, 2007
    Applicant: Elpida Memory, Inc.
    Inventor: Kazuyuki Okada
  • Publication number: 20070047361
    Abstract: A semiconductor memory device has a plurality of banks in which operations are performed for the banks in accordance with a command supplied from an external controller. The semiconductor memory device comprises a latch circuit for latching a bank selection signal indicative of a bank which was precharged last among the banks before execution of an auto refresh command for sequentially refreshing the banks, and a refresh control circuit, responsive to the execution of the auto refresh command, for controlling the order in which the banks are refreshed according to the auto refresh command such that a bank which is selected by the latched selection signal is refreshed last among the banks.
    Type: Application
    Filed: August 1, 2006
    Publication date: March 1, 2007
    Inventor: Kazuyuki Okada
  • Patent number: 6984456
    Abstract: There is provided a flexible printed wiring board including an insulating layer having a high optical transmittance, a high adhesion strength and a high migration resistance, and suitable for a chip on film (hereafter referred to as COF). In a flexible printed wiring board for COF, having an insulating layer on which a conductive layer of an electrodeposited copper foil is laminated, and an optical transmittance of 50% or more of the insulating layer in the etched region when a circuit is formed by etching said conductive layer, electrodeposited copper foil was made to have a rust-proofing layer of a nickel-zinc alloy on the adhering surface to be adhered to the insulating layer; the surface roughness (Rz) of the adhering surface was made to be 0.05 to 1.5 ?m, and the specular gloss was made to be 250 or more when the incident angle is 60°.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: January 10, 2006
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Kazuyuki Okada, Yasuji Hara, Akira Uchiyama, Masaru Takahashi
  • Patent number: 6967895
    Abstract: In an internal clock control circuit (5) that receives a DQSE signal whose timings have been controlled by a CLK signal received by a register (3) and a write CMD received by an enable signal control circuit (4), by a DQSin signal output from a first-stage input circuit 2 for a DQS signal, and the DQSE signal, two NAND circuits constituting a flip flop circuit turn a p-channel transistor (Q) on when a signal waveform in the first cycle is input, and off when signal waveforms in the second or subsequent cycle.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: November 22, 2005
    Assignee: Elpida Memory, Inc.
    Inventor: Kazuyuki Okada
  • Publication number: 20040257889
    Abstract: In an internal clock control circuit (5) that receives a DQSE signal whose timings have been controlled by a CLK signal received by a register (3) and a write CMD received by an enable signal control circuit (4), by a DQSin signal output from a first-stage input circuit 2 for a DQS signal, and the DQSE signal, two NAND circuits constituting a flip flop circuit turn a p-channel transistor (Q) on when a signal waveform in the first cycle is input, and off when signal waveforms in the second or subsequent cycle.
    Type: Application
    Filed: May 14, 2004
    Publication date: December 23, 2004
    Inventor: Kazuyuki Okada
  • Publication number: 20040163842
    Abstract: There is provided a flexible printed wiring board including an insulating layer having a high optical transmittance, a high adhesion strength and a high migration resistance, and suitable for a chip on film (hereafter referred to as COF). In a flexible printed wiring board for COF, having an insulating layer on which a conductive layer of an electrodeposited copper foil is laminated, and an optical transmittance of 50% or more of the insulating layer in the etched region when a circuit is formed by etching said conductive layer, electrodeposited copper foil was made to have a rust-proofing layer of a nickel-zinc alloy on the adhering surface to be adhered to the insulating layer; the surface roughness (Rz) of the adhering surface was made to be 0.05 to 1.5 &mgr;m, and the specular gloss was made to be 250 or more when the incident angle is 60°.
    Type: Application
    Filed: January 13, 2004
    Publication date: August 26, 2004
    Inventors: Kazuyuki Okada, Yasuji Hara, Akira Uchiyama, Masaru Takahashi
  • Patent number: 5673090
    Abstract: A mechanical deck guide and a board guide for video in which a video set and a print board for video are provided integrally with a front cabinet, and a board guide for television is disposed in an array with the board guide for video. A shield plate is provided on the mechanical deck guide so as to cover it.
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: September 30, 1997
    Assignee: Funai Electric Co., Ltd.
    Inventors: Yoshio Higuchi, Kazuyuki Okada
  • Patent number: 5654778
    Abstract: An image display device, having a casing in which a television device and a video device are enclosed, includes a main circuit board having a first area for installing electronic parts of a power supply circuit and a second area for installing remaining electronic parts for TV and video device. Since the electronic parts of the power supply circuit are arranged within a separated area formed on the main circuit board, the electronic parts for the TV device and the electronic parts for the video device can be installed with high density and with no substantial interference with each other.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: August 5, 1997
    Assignee: Funai Electric Co., Ltd.
    Inventors: Yosio Higuchi, Kazuyuki Okada
  • Patent number: 5583582
    Abstract: A mechanical deck guide and a board guide for video in which a video set and a print board for video are provided integrally with a front cabinet, and a board guide for television is disposed in an array with the board guide for video. A shield plate is provided on the mechanical deck guide so as to cover it.
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: December 10, 1996
    Assignee: Funai Electric Co., Ltd.
    Inventors: Yoshio Higuchi, Kazuyuki Okada
  • Patent number: RE37332
    Abstract: An image display device, having a casing in which a television device and a video device are enclosed, includes a main circuit board having a first area for installing electronic parts of a power supply circuit and a second area for installing remaining electronic parts for TV and video device. Since the electronic parts of the power supply circuit are arranged within a separated area formed on the main circuit board, the electronic parts for the TV device and the electronic parts for the video device can be installed with high density and with no substantial interference with each other.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: August 21, 2001
    Assignee: Funai Electric Co., Ltd.
    Inventors: Yoshio Higuchi, Kazuyuki Okada