Patents by Inventor Kazuyuki Taguchi

Kazuyuki Taguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9994469
    Abstract: Provided is a wastewater treatment method that keeps Bacillus predominant inside the biological treatment tank and makes it possible to improve the water quality of the treated water while suppressing the volume of sludge generated in association with wastewater treatment. A wastewater treatment method for purifying wastewater by microorganisms in a biological treatment tank wherein the wastewater is purified by causing a first microorganism belonging to the genus Bacillus that is + for nitric acid reduction and ? for starch decomposition and a second microorganism that is ? for nitric acid reduction and + for starch decomposition in testing of the physiological properties of microorganisms to be predominant inside the biological treatment tank.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: June 12, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kazuyuki Taguchi, Keigo Yasuda, Yosuke Hanai, Tetsuya Abe, Hideharu Mae
  • Publication number: 20170362109
    Abstract: A method for treating wastewater and an activator for treating wastewater that maximizes the utilization of microorganisms such as Bacillus bacteria in an activated sludge treatment of wastewater while minimizing treatment cost. In the method for treating wastewater, wastewater including organic matter is introduced into a treatment tank and the wastewater is subjected to an activated sludge treatment by microorganisms in the treatment tank, wherein an activator containing a component for activating the microorganisms is added to the wastewater to be subjected to the activated sludge treatment in the treatment tank; and at least 50% (by quantity) of the entirety of the activator has a particle size of less than 10 pm. Also provided is an activator therefor. The microorganisms preferably include Bacillus bacteria.
    Type: Application
    Filed: August 29, 2017
    Publication date: December 21, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kazuyuki TAGUCHI
  • Publication number: 20170166465
    Abstract: Provided is a wastewater treatment method that keeps Bacillus predominant inside the biological treatment tank and makes it possible to improve the water quality of the treated water while suppressing the volume of sludge generated in association with wastewater treatment. A wastewater treatment method for purifying wastewater by microorganisms in a biological treatment tank wherein the wastewater is purified by causing a first microorganism belonging to the genus Bacillus that is + for nitric acid reduction and ? for starch decomposition and a second microorganism that is ? for nitric acid reduction and + for starch decomposition in testing of the physiological properties of microorganisms to be predominant inside the biological treatment tank.
    Type: Application
    Filed: February 3, 2015
    Publication date: June 15, 2017
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kazuyuki TAGUCHI, Keigo YASUDA, Yosuke HANAI, Tetsuya ABE, Hideharu MAE
  • Patent number: 7026188
    Abstract: A manufacturing method of an electronic device comprises the steps of: preparing a printed wiring board having a first region and a second region which differ from each other over one main surface thereof, a first electronic component having a plurality of first projection electrodes over one main surface thereof, and a second electronic component having a plurality of second projection electrodes which have a melting point higher than a melting point of the first projection electrodes over one main surface thereof; mounting the first electronic component on the first region of one main surface of the printed wiring board by melting the plurality of first projection electrodes; and mounting the second electronic component on the second region of one main surface of the printed wiring board by compression-bonding the second electronic component while heating in a state that an adhesive resin is interposed between the second region of one main surface of the printed wiring board and one main surface of the s
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: April 11, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Kazuyuki Taguchi, Norihiko Sugita, Hideki Tanaka
  • Publication number: 20040235221
    Abstract: A manufacturing method of an electronic device comprises the steps of:
    Type: Application
    Filed: December 19, 2003
    Publication date: November 25, 2004
    Inventors: Kazuyuki Taguchi, Norihiko Sugita, Hideki Tanaka
  • Publication number: 20030102570
    Abstract: An electronic device comprising: a semiconductor chip having plural electrode pads on one main surface thereof; a wiring board having plural connection parts; and plural salient electrodes disposed respectively between the electrode pads of the semiconductor chip and the connection parts of the wiring board to provide electrical connections between the two, the salient electrodes being arranged in an array not providing balance of the semiconductor chip with respect to one main surface of the wiring board, the plural connection parts of the wiring board being arranged at a deeper position than one main surface of the wiring board in a depth direction from the one main surface.
    Type: Application
    Filed: October 25, 2002
    Publication date: June 5, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Satoshi Imasu, Ikuo Yoshida, Norio Kishikawa, Yoshiyuki Kado, Kazuyuki Taguchi, Takahiro Naito, Toshihiko Sato
  • Patent number: 6492737
    Abstract: An electronic device comprising: a semiconductor chip having plural electrode pads on one main surface thereof; a wiring board having plural connection parts; and plural salient electrodes disposed respectively between the electrode pads of the semiconductor chip and the connection parts of the wiring board to provide electrical connections between the two, the salient electrodes being arranged in an array not providing balance of the semiconductor chip with respect to one main surface of the wiring board, the plural connection parts of the wiring board being arranged at a deeper position than one main surface of the wiring board in a depth direction from the one main surface.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: December 10, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Satoshi Imasu, Ikuo Yoshida, Norio Kishikawa, Yoshiyuki Kado, Kazuyuki Taguchi, Takahiro Naito, Toshihiko Sato