Patents by Inventor Ke Bai

Ke Bai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240131697
    Abstract: The present invention relates to a parallel robot system, including: a control apparatus; a parallel robot, including a mounting base, a moving platform, and a driving apparatus arranged between the mounting base and the moving platform, where the driving apparatus is configured to drive the moving platform to make multi-degree-of-freedom movement relative to the mounting base, and the driving apparatus receives a control signal from the control apparatus; a tracer, arranged on the moving platform; a passive arm, where the mounting base of the parallel robot is connected to one end of the passive arm; and an optical positioning and tracking apparatus, configured to track a spatial position of the tracer in real time and to send spatial position data of the tracer to the control apparatus.
    Type: Application
    Filed: May 4, 2022
    Publication date: April 25, 2024
    Inventors: Gang ZHU, Wei TIAN, Kewen MU, Chuan BAI, Ke XU, Xiangrui ZHAO
  • Patent number: 11886117
    Abstract: An adhesion promoter as shown in Formula (I) and a photosensitive resin composition containing the adhesion promoter are disclosed: where R1, R2 and R3 each refer to a hydrogen atom, an optionally substituted C1-C20 alkyl, an optionally substituted C2-C20 alkenyl, an optionally substituted C2-C20 alkynyl, an optionally substituted phenyl, or other optionally substituted carbon atom; A refers to an optionally substituted C1-C20 alkyl, an optionally substituted C2-C20 alkenyl, an optionally substituted C2-C20 alkynyl, an optionally substituted phenyl, or other an optionally substituted carbon atom substituents; and the carbon in the alkyl, the alkenyl, the alkynyl, the phenyl, or the carbon atom substituents is optionally substituted with one or more of N, O and S; and X refers to an optionally substituted aromatic heterocyclic group. The adhesion promoter and the photosensitive resin composition can be used for manufacturing a semiconductor integrated circuit (IC), a LED and a flat-panel display.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: January 30, 2024
    Assignee: SHANDONG SHENGQUAN NEW MATERIALS CO LTD.
    Inventors: Diyuan Tang, Zhifang Li, Ke Bai, Bin Liu, Chuanming Sun
  • Publication number: 20220373887
    Abstract: An adhesion promoter as shown in Formula (I) and a photosensitive resin composition containing the adhesion promoter are disclosed: where R1, R2 and R3 each refer to a hydrogen atom, an optionally substituted C1-C20 alkyl, an optionally substituted C2-C20 alkenyl, an optionally substituted C2-C20 alkynyl, an optionally substituted phenyl, or other optionally substituted carbon atom; A refers to an optionally substituted C1-C20 alkyl, an optionally substituted C2-C20 alkenyl, an optionally substituted C2-C20 alkynyl, an optionally substituted phenyl, or other an optionally substituted carbon atom substituents; and the carbon in the alkyl, the alkenyl, the alkynyl, the phenyl, or the carbon atom substituents is optionally substituted with one or more of N, O and S; and X refers to an optionally substituted aromatic heterocyclic group. The adhesion promoter and the photosensitive resin composition can be used for manufacturing a semiconductor integrated circuit (IC), a LED and a flat-panel display.
    Type: Application
    Filed: July 2, 2019
    Publication date: November 24, 2022
    Applicant: SHANDONG SHENGQUAN NEW MATERIALS CO LTD.
    Inventors: Diyuan TANG, Zhifang LI, Ke BAI, Bin LIU, Chuanming SUN
  • Patent number: 9513886
    Abstract: A compiler tool-chain may automatically compile an application to execute on a limited local memory (LLM) multi-core processor by including automated heap management transparently to the application. Management of the heap in the LLM for the application may include identifying access attempts to a program variable, transferring the program variable to the LLM, when not already present in the LLM, and returning a local address for the program variable to the application. The application then accesses the program variable using the local address transparently without knowledge about data in the LLM. Thus, the application may execute on a LLM multi-core processor as if the LLM multi-core processor has an unlimited heap space.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: December 6, 2016
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: Ke Bai, Aviral Shrivastava
  • Publication number: 20160170725
    Abstract: Software Managed Manycore (SMM) architectures with scratch pad memory for reach core are a promising solution for scaling memory. In these architectures the code and data of the tasks mapped to the cores is explicitly managed by the compiler and often require inter-procedural information and analysis. But, a call graph of the program does not have enough information, and the Global CFG has too much information. Most new techniques informally define and use GCCFG (Global Call Control Flow Graph)—a whole program representation that succinctly captures the control-flow and function call information—to perform inter-procedural analysis. Constructing GCCFGs for several cases in common applications. The present disclosure provides unique graph transformations to formally and correctly construct GCCFGs for optimal compiler management of manycore systems.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 16, 2016
    Applicant: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
    Inventors: Bryce Holton, Aviral Shrivastava, Ke Bai
  • Patent number: 9015689
    Abstract: Methods and apparatus for managing stack data in multi-core processors having scratchpad memory or limited local memory. In one embodiment, stack data management calls are inserted into software in accordance with an integer linear programming formulation and a smart stack data management heuristic. In another embodiment, stack management and pointer management functions are inserted before and after function calls and pointer references, respectively. The calls may be inserted in an automated fashion by a compiler utilizing an optimized stack data management runtime library.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: April 21, 2015
    Assignee: Board of Regents on Behalf of Arizona State University
    Inventors: Ke Bai, Aviral Shrivastava, Jing Lu
  • Publication number: 20140282454
    Abstract: Methods and apparatus for managing stack data in multi-core processors having scratchpad memory or limited local memory. In one embodiment, stack data management calls are inserted into software in accordance with an integer linear programming formulation and a smart stack data management heuristic. In another embodiment, stack management and pointer management functions are inserted before and after function calls and pointer references, respectively. The calls may be inserted in an automated fashion by a compiler utilizing an optimized stack data management runtime library.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 18, 2014
    Applicant: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Ariz
    Inventors: Ke Bai, Aviral Shrivastava, Jing Lu
  • Publication number: 20140215192
    Abstract: A compiler tool-chain may automatically compile an application to execute on a limited local memory (LLM) multi-core processor by including automated heap management transparently to the application. Management of the heap in the LLM for the application may include identifying access attempts to a program variable, transferring the program variable to the LLM, when not already present in the LLM, and returning a local address for the program variable to the application. The application then accesses the program variable using the local address transparently without knowledge about data in the LLM. Thus, the application may execute on a LLM multi-core processor as if the LLM multi-core processor has an unlimited heap space.
    Type: Application
    Filed: January 28, 2014
    Publication date: July 31, 2014
    Applicant: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
    Inventors: Ke Bai, Aviral Shrivastava