Abstract: A data compression process and system that identifies the data type of an input data stream and then selects in response to the identified data type at least one data compression method from a set of data compression methods that provides an optimal compression ratio for that particular data type, thus maximizing the compression ratio for that input data stream. Moreover, the data compression process also provides means to alter the rate of compression during data compression for added flexibility and data compression efficiency. Furthermore, a system memory allocation process is also provided to allow system or user control over the amount of system memory to be allocated for the memory intensive data compression process. System memory allocation process estimates the memory requirement to compress the input data stream, and allocates only that amount of system memory as needed by the data compression for memory allocation efficiency.

Abstract: Storage and access of compressed data via separately compressed and stored variable size logical blocks. Portions of an uncompressed data file are compressed until they reach a logical block size which matches a given sector size or block of storage space. Then that compressed logical block (portion of compressed data) is stored into a sector allocated to it and a table is built correlating the range of original compressed data to the sector storing the compressed data. In this way, data is compressed into a block size which matches the characteristics of the particular storage medium used. Thus the present invention efficiently stores compressed data by filling allocated sectors. When it is desired to read a given portion of data within a stored compressed data file, it is first determined where within the original data file the desired portion resided. Then, the table created as part of the compression and storage sequence is used to determine which sector contains the desired data.

Abstract: A method and apparatus for decoding a variable length codeword (VLC) by reading a VLC, the VLC having a maximum length of X bits. The VLC is used as an index into a first table, wherein the first table contains decoded values for all possible VLC's with Y bits not equal to any value in a first set of values. Y is typically less than X and comprises, in the preferred embodiment, the most significant bits of the VLC. If the first Y bits of the VLC are not equal to any value in a first set of values then a second value is returned from the first table. If the first Y bits of the VLC are equal to any value in a first set of values, then a pointer to a second table is returned from the first table. The VLC is used as an index into the second table, and a third value is returned from the second table.

Abstract: An apparatus and method for processing video data for compression/decompression in real-time. The apparatus comprises a plurality of compute modules, in a preferred embodiment, for a total of four compute modules coupled in parallel. Each of the compute modules has a processor, dual port memory, scratch-pad memory, and an arbitration mechanism. A first bus couples the compute modules and a host processor. Lastly, the device comprises a shared memory which is coupled to the host processor and to the compute modules with a second bus. The method handles assigning portions of the image for each of the processors to operate upon.

Abstract: A lossless data compression circuit compares a new data string with a set of comparison data, and produces a sequence of codewords representing a sequence of successive, non-overlapping substrings of the new data string. A shift register stores and shifts the comparison data until all of the characters in the comparison data have been compared with the new data string. A composite reproduction length circuit finds the maximum length string within the set of comparison characters matching substrings of characters in the new data string beginning at each position in the new data string. The composite reproduction length circuit produces a multiplicity of data pairs, one for each position of the new data string. Each data pair comprises a maximum length value, corresponding to the maximum length matching comparison string found for the new data substring starting at the corresponding position, and a pointer value denoting where the maximum length matching comparison string is located in the comparison data.

Abstract: Automatically updatable error logging means incorporated in a multi-phase, bit addressable, variable field memory system. The memory system is partitioned into a plurality of individually addressable memory stacks and employs time-shared accessing of the memory stacks along with time-shared error detection and correction which is used with the error logging means to provide for automatic logging of detected errors during memory accesses on a priority basis.

Abstract: A multi-phase, bit addressable, variable field memory system partitioned into a plurality of individually addressable memory stacks and employing time-shared accessing circuitry as well as time shared error detection and data correction means, whereby serial memory stack accessing along with serial error checking and correction are achieved without significantly increasing the overall memory accessing time over that obtained for parallel accessing.

Abstract: Automatically updatable error logging means incorporated in a multi-phase, bit addressable, variable field memory system. The memory system is partitioned into a plurality of individually addressable memory stacks and employs time-shared accessing of the memory stacks along with time-shared error detection and correction which is used with the error logging means to provide for automatic logging of the detected errors during memory accesses on a priority basis.

Abstract: A bit addressable, variable field memory system partitioned into a plurality of individually addressable memory stacks and employing time-shared accessing circuitry in conjunction with the use of serial, multi-phase accessing of the memory stacks, whereby the advantages of serial memory stack accessing are achieved without significantly increasing the overall memory accessing time over that obtained for parallel accessing.