Patents by Inventor KE-FENG YOU

KE-FENG YOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230413220
    Abstract: A wireless communication module is provided. The wireless communication module is configured to be installed on a server. The wireless communication module includes a carrier and a first wireless communication unit. The carrier is configured to be electrically coupled to the server. The first wireless communication unit is arranged on the carrier, and is electrically coupled to the carrier. The first wireless communication unit is configured to be controlled by the server via the carrier to emit and/or receive the radio wave. A related server is also provided.
    Type: Application
    Filed: February 28, 2023
    Publication date: December 21, 2023
    Inventors: LIN ZHANG, LI-WEN GUO, KE-FENG YOU
  • Publication number: 20230389208
    Abstract: A riser card module is provided. The riser card module is configured to be coupled to a server. The riser card module includes a carrier and an adapter interface. The carrier is configured to be electrically coupled to the server. The adapter interface is arranged on the carrier, and is electrically coupled to the carrier. The adapter interface is configured to be coupled to different external devices to expand different functions for the server via the carrier. The adapter interface is a mezzanine interface. A related server is also provided.
    Type: Application
    Filed: February 28, 2023
    Publication date: November 30, 2023
    Inventors: KE-FENG YOU, LIN ZHANG
  • Publication number: 20230354561
    Abstract: The present disclosure provides a motherboard protection circuit and a server. The motherboard protection circuit includes a baseboard management controller (BMC), a first connector and a first conversion circuit. The first connector outputs a first rotational speed signal when a fan is electrically connected to the first connector. The first conversion circuit is electrically connected between the BMC and the first connector, the first conversion circuit converts a first voltage of the first rotational speed signal into a second voltage and output a converted first rotational speed signal to the BMC. The BMC monitors a rotational speed of the fan according to the converted first rotational speed signal. The first conversion circuit maintains the voltage of the rotational speed signal to an ideal voltage, and outputs the rotational speed signal to the BMC, so that the BMC can normally receive the rotational speed signal.
    Type: Application
    Filed: February 2, 2023
    Publication date: November 2, 2023
    Inventors: LIN ZHANG, KE-FENG YOU, YING LI
  • Publication number: 20230334184
    Abstract: A data center security control module adaptable for installation and use on additional platforms beyond a standard Intel platform includes a baseboard management controller (BMC), a power module, a switch module, and a control module. The power module is configured for supplying power to the BMC. The switch module is electrically connected between the BMC and the power module. The control module obtains information as to a motherboard type of an external motherboard and turns the switch module on or off to make or break a connection between the BMC and the power module depending on the motherboard type. The application also provides a data center security control module control method.
    Type: Application
    Filed: June 20, 2022
    Publication date: October 19, 2023
    Inventors: LIN ZHANG, LI-WEN GUO, KE-FENG YOU
  • Patent number: 11748293
    Abstract: A method of automatic identification of PCIe configuration of a server and preventing operation if each slimline connector connected with a PCIe device is found connected to an incorrect slot of a mother board utilizes a combination of first and second signals of two null interfaces of the first connector as that ID signal and a combination of third and fourth signals of the two interfaces of a second connector as that ID signal. The CPLD receiving the ID signals detects whether the first and second slimline connectors are in their specified and correct slots. Powering on of computer is not permitted if incorrect connection is found, and a warning prompt is generated. A PCIe channel width for each slimline is automatically configured if no incorrect connection is found. A server applying the method is also disclosed.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: September 5, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: Hou-Fei Shang, Li-Wen Guo, Xiao-Long Zhou, Zhen-Zhu Zhang, Ke-Feng You, Jian-Fei Wang, Miao Zhang
  • Publication number: 20230147267
    Abstract: A method of automatic identification of PCIe configuration of a server and preventing operation if each slimline connector connected with a PCIe device is found connected to an incorrect slot of a mother board utilizes a combination of first and second signals of two null interfaces of the first connector as that ID signal and a combination of third and fourth signals of the two interfaces of a second connector as that ID signal. The CPLD receiving the ID signals detects whether the first and second slimline connectors are in their specified and correct slots. Powering on of computer is not permitted if incorrect connection is found, and a warning prompt is generated. A PCIe channel width for each slimline is automatically configured if no incorrect connection is found. A server applying the method is also disclosed.
    Type: Application
    Filed: June 17, 2022
    Publication date: May 11, 2023
    Inventors: HOU-FEI SHANG, LI-WEN GUO, XIAO-LONG ZHOU, ZHEN-ZHU ZHANG, KE-FENG YOU, JIAN-FEI WANG, MIAO ZHANG
  • Publication number: 20210109885
    Abstract: A device for managing an HDD backplane includes a mainboard and a backplane. The mainboard includes a first connector port and a second connector. The backplane includes a first HDD interface, a second HDD interface, an I2C selector, and a CPLD. The first and second HDD interfaces are both electrically connected to the CPLD. The first and second connector ports are both electrically connected to the I2C selector. The I2C selector is electrically connected to the CPLD. The CPLD receives an identification signal from the first HDD interface or the second HDD interface, and determines a type of HDD inserted in the first HDD interface or in the second HDD interface, and outputs a controlling signal to the I2C selector according to the type of HDD which is identified. The I2C selector turns on the first connector port and the second connector port according to the controlling signal.
    Type: Application
    Filed: November 1, 2019
    Publication date: April 15, 2021
    Applicant: Shenzhen Fugui Precision Ind. Co., Ltd.
    Inventors: LI-WEN GUO, KE-FENG YOU
  • Publication number: 20140149617
    Abstract: An Inter-Integrated Circuit (I2C) bus structure includes a master device and a slave device. The slave device is connected to the master device via an I2C bus and an interrupt line. When the master device receives an interrupt request from the slave device via the interrupt line, the master device determines that the slave device is available. When the master device has not received any interrupt request from the slave device via the interrupt line for a time period, the master device determines that the slave device is not available. A device availability query method is also provided.
    Type: Application
    Filed: July 15, 2013
    Publication date: May 29, 2014
    Inventors: REN-HONG CHIANG, DUN-HONG CHENG, KE-FENG YOU