Patents by Inventor Ke Li
Ke Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12113378Abstract: A battery system with a large-format Li-ion battery powers attached equipment by discharging battery cells distributed among a plurality of battery packs. The discharging of the battery cells is controlled in an efficient manner while preserving the expected life of the Li-ion battery cells. Each battery pack internally supports a battery management system and may have identical components, thus supporting an architecture that easily scales to higher power/energy. Battery packs may be added or removed without intervention with a user, where one of battery packs serves as a master battery pack and the remaining battery packs serve as slave battery packs. When the master battery pack is removed, one of the slave battery packs becomes the master battery pack. Charging and discharging of the battery cells is coordinated by the master battery pack with the slave battery packs over a communication channel such as a controller area network (CAN) bus.Type: GrantFiled: May 26, 2023Date of Patent: October 8, 2024Assignee: Inventus Power, Inc.Inventors: Jianfei Liu, Jujie Xia, Youwu Chen, Huizhi Chen, Wenhua Li, Ke Yan, Changda Guan, Zibin Cheng, William Tenorio, Daniel Kang, Chris Turner
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Patent number: 12112814Abstract: Technology for open block boundary group programming of non-volatile memory such as NAND. The open block boundary group could potentially be read in response to a request from a host for the data stored in the group. In an aspect, the memory system will determine whether programming a group of memory cells in a selected block will result in an open block. If it will not result in an open block, then the memory system uses a first set of programming parameters to program the group. However, if it will result in an open block then the memory system uses a second set of programming parameters to program the boundary group. The programming parameters may include verify levels and/or a program voltage step size. The second set of programming parameters can tighten Vt distributions, which mitigates mis-reads if the boundary group is read.Type: GrantFiled: June 10, 2022Date of Patent: October 8, 2024Assignee: Sandisk Technologies, Inc.Inventors: Ke Zhang, Ming Wang, Liang Li
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Publication number: 20240332889Abstract: A laser device and a laser source assembly are provided. The laser device includes a base, a plurality of frames, a plurality of groups of laser chips, and a plurality of collimating lens groups. Any frame is correspondingly provided with a group of laser chips. Any group of laser chips includes a plurality of laser chips. Any collimating lens group includes a plurality of collimating lenses. The plurality of collimating lenses correspond to the plurality of laser chips, respectively. Any collimating lens is located on a laser-exit path of a corresponding laser chip.Type: ApplicationFiled: June 12, 2024Publication date: October 3, 2024Applicant: HISENSE LASER DISPLAY CO., LTDInventors: Ke YAN, Youliang TIAN, Wei LI, Zinan ZHOU, Yao LU, Xin ZHANG
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Patent number: 12108344Abstract: The present application discloses a method and a device for indicating a path loss reference signal, a terminal, a base station and a storage medium. The method for indicating a path loss reference signal includes: receiving an uplink transmission control signaling transmitted by a base station; determining a spatial domain relationship parameter of uplink transmission according to the uplink transmission control signaling; and determining a path loss reference signal used for uplink transmission power control according to the spatial domain relationship parameter of uplink transmission. According to the technical solutions provided by the embodiments, the path loss reference signal is determined according to the spatial domain relationship parameter, which saves signaling overhead, and improves configuration flexibility of a path loss reference signal used for uplink transmission power control.Type: GrantFiled: June 17, 2020Date of Patent: October 1, 2024Assignee: ZTE CORPORATIONInventors: Jiaqi Zhao, Ke Yao, Bo Gao, Hong Chang, Ping Li
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Patent number: 12103872Abstract: Disclosed is a polycyclic azide desulfurizer, including the following raw materials in parts by mass: 20-35 parts of an alcohol amine, 20-35 parts of an amide, and an aldehyde, which is 10-15 parts of a small-molecule aldehyde or 20-35 parts of a polyaldehyde. Also disclosed is a method for synthesis of the polycyclic azide desulfurizer, including: mixing an alcohol amine with an amide and stirring, heating, adding a catalyst I dropwise, and performing reaction to obtain a monocyclic triazine, heating the monocyclic triazine, mixing with a polyaldehyde and stirring, adding a catalyst II dropwise, and performing coupling while stirring; alternatively, mixing a small-molecule aldehyde with an amide and stirring, heating, adding a catalyst I dropwise, and performing reaction, adding an alcohol amine, adding a catalyst II dropwise, and performing coupling while stirring; and separating a by-product from a product obtained after the coupling out, and purifying the product.Type: GrantFiled: December 19, 2023Date of Patent: October 1, 2024Assignee: Southwest Petroleum UniversityInventors: Xingyu Peng, Jianhua Gong, Feng Ge, Yang Ren, Huaiyu Sun, Lisheng Liu, Zhihua Yuan, Ke Yan, Feng Ye, Hong Li
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Publication number: 20240317744Abstract: The present application provides bicyclic urea compounds that modulate the activity of JAK2, which are useful in the treatment of various diseases, including cancer.Type: ApplicationFiled: March 12, 2024Publication date: September 26, 2024Inventors: Xin Li, Oleg Vechorkin, Yanran Ai, Onur Atasoylu, Hang Thi Dang, Brent Douty, Chunhong He, Peng He, Michael Liang, Minh Nguyen, Evan Styduhar, Anlai Wang, Xiaozhao Wang, Hai Fen Ye, Eddy W. Yue, Ke Zhang, Peng Zhao
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Publication number: 20240321479Abstract: Disclosed are a composite paste for power devices packaging and a preparation method therefor, falling within the field of packaging materials for power devices. The composite paste for power devices packaging of the present disclosure is prepared from a silver-copper filler and an organic carrier, and the silver-copper filler is a mixture of flaky silver and spherical copper. The method of the present disclosure includes: step 1: stirring a silver-copper filler and an organic carrier until uniform mixing to obtain a mixed paste; and step 2: performing three-stage dispersion grinding on the mixed paste to obtain the composite paste for power devices packaging. The preparation process of the present disclosure is simple, and the obtained composite paste has low cost, good thermal conductivity, no obvious electromigration failure and excellent mechanical properties, significantly improving the reliability of power device packaging.Type: ApplicationFiled: June 5, 2024Publication date: September 26, 2024Inventors: Yang Liu, Ke Li, Zehou Li, Jianbo Xin
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Patent number: 12100107Abstract: Techniques are provided for generating three-dimensional models of objects from one or more images or frames. For example, at least one frame of an object in a scene can be obtained. A portion of the object is positioned on a plane in the at least one frame. The plane can be detected in the at least one frame and, based on the detected plane, the object can be segmented from the plane in the at least one frame. A three-dimensional (3D) model of the object can be generated based on segmenting the object from the plane. A refined mesh can be generated for a portion of the 3D model corresponding to the portion of the object positioned on the plane.Type: GrantFiled: July 17, 2023Date of Patent: September 24, 2024Assignee: QUALCOMM IncorporatedInventors: Ke-Li Cheng, Kuang-Man Huang, Michel Adib Sarkis, Gerhard Reitmayr, Ning Bi
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Patent number: 12099187Abstract: An AR optical system includes a depth-of-field separation structure corresponding to an image source, configured to convert light rays emitted from the image source into a plurality of light beams with different depths of field; a convergent lens located on an emergent light path of the depth-of-field separation structure, and configured to receive and shape the plurality of light beams with different depths of field; a first semi-transmitting semi-reflecting mirror located on a side, away from the depth-of-field separation structure, of the convergent lens, and configured to reflect the plurality of shaped light beams with different depths of field towards a set direction; a concave mirror having a preset transmission-reflection ratio configured to reflect and converge the plurality of light beams with different depths of field and then make the light beam incident to a set observation position after passing through the first semi-transmitting semi-reflecting mirror.Type: GrantFiled: January 11, 2021Date of Patent: September 24, 2024Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Ke Li, Yulong Wu, Ruijun Dong, Yali Liu, Chenru Wang, Hao Zhang
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Publication number: 20240309709Abstract: In general, the invention relates to a drill bit. The drill bit includes a first tubular member including a pin end and a pin thread structure extending helically along an outer surface of the pin end in spaced thread turns, the pin thread structure including: a first pin flank and a second pin flank; a pin crest extending between a top edge of the first pin flank and a top edge of the second pin flank; and a pin root extending between a bottom edge of the first flank and a bottom edge of a flank of an adjacent thread turn.Type: ApplicationFiled: March 15, 2023Publication date: September 19, 2024Inventors: Haoming Li, Fei Song, Ke Li, Sayan Banerjee, Ambrish Pandey
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Publication number: 20240313510Abstract: A light source and a laser projection device are provided. The light source includes a laser array, a light combining mirror group, and a light spot shaping component. The laser array includes a first row of laser chips and a second row of laser chips. The first row of laser chips includes at least one first-color laser chip and at least one second-color laser chip, and the second row of laser chips includes at least two red laser chips. The light combining mirror group is configured to combine laser beams emitted by the laser array. The light spot shaping component is configured to receive and adjust a light beam coming from the light combining mirror group to increase the difference between the length of a light spot of the light beam in a long side direction and the length thereof in a short side direction.Type: ApplicationFiled: May 24, 2024Publication date: September 19, 2024Inventors: Wei Li, Youliang Tian, Xianrong Liu, Ke Yan
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Patent number: 12096655Abstract: A display substrate, a display panel, and a display device are provided. The display substrate includes: a base substrate; and a first transistor on the base substrate. The first transistor includes a first active layer, a first bottom gate electrode between the base substrate and the first active layer, and a first top gate electrode on a side of the first active layer away from the base substrate. A third gate insulating layer is provided between the first bottom gate electrode and the first active layer. The first active layer contains an oxide semiconductor material, and the third gate insulating layer contains a silicon oxide material. A surface of the first bottom gate electrode away from the base substrate is in direct contact with the silicon oxide material, and a surface of the first active layer close to the base substrate is in direct contact with the silicon oxide material.Type: GrantFiled: September 30, 2020Date of Patent: September 17, 2024Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Bingqiang Gui, Yang Yu, Peng Huang, Tao Gao, Wenqiang Li, Ke Liu
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Publication number: 20240300555Abstract: A method for 3D positioning in a subway construction site. The method includes: establishing a 3D coordinate system corresponding to a shaft area, and determining a coordinate of each UWB base station set in different layers of the shaft area; ranging a positioning label through each UWB base station; filtering and discarding error data from the ranging data; dividing the 3D coordinate system into a plurality of equal cube grids, selecting a preset number of UWB base stations from the set UWB base stations based on the filtered result, and determining a position record of the positioning label in each cube grid in turn based on coordinates of the selected UWB base stations and corresponding ranging data, and the center point coordinate of each cube grid; and determining a conclusion coordinate of the positioning label by voting based on the position record of each cube grid.Type: ApplicationFiled: September 28, 2021Publication date: September 12, 2024Applicant: China Railway Engineering Services Co., Ltd.Inventors: Ke Chen, Suimei Liu, Yuanliang Tan, Youxing Wu, Mengliu Yang, Xiang Liu, Longguan Zhang, Kaifu Li, Zhaohua Liu, Qibin Wang
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Publication number: 20240304185Abstract: A method of a multilingual ASR model includes receiving a sequence of acoustic frames characterizing an utterance of speech. At a plurality of output steps, the method further includes generating a first higher order feature representation for an acoustic frame by a first encoder that includes a first plurality of multi-head attention layers; generating a second higher order feature representation for a corresponding first higher order feature representation by a second encoder that includes a second plurality of multi-head attention layers; and generating, by a first decoder, a first probability distribution over possible speech recognition hypotheses based on the second higher order feature representation and a sequence of N previous non-blank symbols. A gating layer of each respective MoE layer configured to dynamically route an output from a previous multi-head attention layer at each of the plurality of output steps to a respective pair of feed-forward expert networks.Type: ApplicationFiled: March 7, 2024Publication date: September 12, 2024Applicant: Google LLCInventors: Ke Hu, Bo Li, Tara N. Sainath, Yu Zhang, Francoise Beaufays
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Publication number: 20240304130Abstract: A driving method of a display panel and a display apparatus provided by embodiments of the present disclosure include: when a display mode switching startup instruction is received, a non-counting state is entered. The display panel is driven to display a first set picture, and a current display mode is switched to a target display mode. When a data mode switching completing instruction is received, a counting state is entered.Type: ApplicationFiled: May 16, 2022Publication date: September 12, 2024Inventors: Yanting HUANG, Ke DAI, Chunyang NIE, Liugang ZHOU, Yunlu CHEN, Qing LI, Jun WANG, Zhi MENG, Wei SUN, Tianxun XIU, Yue YANG
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Patent number: 12089302Abstract: System and method for controlling one or more light emitting diodes. For example, the system includes: a voltage detector configured to receive a rectified voltage associated with a TRIAC dimmer and generated by a rectifying bridge and generate a first sensing signal representing the rectified voltage; a distortion detector configured to receive the first sensing signal, determine whether the rectified voltage is distorted or not based at least in part on the first sensing signal, and generate a distortion detection signal indicating whether the rectified voltage is distorted or not; and a phase detector configured to receive the first sensing signal and generate a phase detection signal indicating a detected phase range within which the TRIAC dimmer is in a conduction state based at least in part on the first sensing signal.Type: GrantFiled: July 11, 2023Date of Patent: September 10, 2024Assignee: On-Bright Electronics (Shanghai) Co., Ltd.Inventors: Ke Li, Zhuoyan Li, Liqiang Zhu
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Patent number: 12088894Abstract: A camera includes a first microphone, a second microphone, one or more drains, and a processor. The processor determines a correlation metric between portions of audio signals obtained from the first and second microphones. The one or more drains drain water away from the first microphone, the second microphone, or both. The camera includes a memory to store the portions of the audio signals as portions of an output audio signal.Type: GrantFiled: April 22, 2022Date of Patent: September 10, 2024Assignee: GoPro, Inc.Inventors: Zhinian Jing, Ke Li, Erich Tisch, Joyce Rosenbaum, Magnus Hansson
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Publication number: 20240296882Abstract: Method for performing a memory operation with respect to a memory structure having “N”-number of planes, each plane comprising “M”-number of blocks and “X”-number of word lines arranged in a serial order, and electrically connected with each plane are: a voltage bias source, an electronic switching component, and row decoder, the method comprising: with respect to each plane, selecting a block and a word line for application of the operation, wherein the operation has not been applied to the selected block and word line, the selected block of one plane is located in a different block group from the selected block of another plane, and the selected word line of one plane is in a different position within the serial order from a position of the selected word line of another plane; and using the voltage bias source, concurrently applying the operation to the selected blocks and selected word lines.Type: ApplicationFiled: July 20, 2023Publication date: September 5, 2024Applicant: Western Digital Technologies, Inc.Inventors: Ke Zhang, Liang Li, Jiahui Yuan
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Publication number: 20240296877Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and disposed in memory holes coupled to bit lines. A control means successively applies each of a series of pulses of a program voltage to selected ones of the word lines while simultaneously applying one of a bit line program voltage and a bit line inhibit voltage to ones of the bit lines coupled to the memory holes containing groups of the memory cells connected to the selected ones of the plurality of word lines to program the groups of the memory cells with data. The control means maintains a voltage applied to ones of the plurality of bit lines as the bit line inhibit voltage in response to the ones of the plurality of bit lines remaining unselected when programming a next one of the groups of the memory cells.Type: ApplicationFiled: July 24, 2023Publication date: September 5, 2024Applicant: Western Digital Technologies, Inc.Inventors: Ke Zhang, Linnan Chen, Liang Li, Minna Li, Chin-Yi Chen, Xiaojia Jia, Muhammad Masuduzzaman, Xiang Yang
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Patent number: D1042618Type: GrantFiled: April 27, 2023Date of Patent: September 17, 2024Assignee: Zhuhai Pantum Electronics Co., Ltd.Inventors: Aiguo Yin, Jibing Peng, Geng Wang, Ke Mou, Weisheng He, Huizhao Deng, Tian Wang, Rubo Li, Dongrong Liu