Patents by Inventor Ke Wei

Ke Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149359
    Abstract: A controlling method for semiconductor process auxiliary apparatus, a control assembly and a manufacturing system are provided. The controlling method includes the following steps. At least one manufacturing parameter of a semiconductor manufacturing processing apparatus are obtained. An energy adjusting signal is generated according to the manufacturing parameter. An auxiliary apparatus controlling signal is generated according to the energy adjusting signal. The semiconductor process auxiliary apparatus is controlled according to the semiconductor auxiliary apparatus controlling signal.
    Type: Application
    Filed: December 26, 2023
    Publication date: May 8, 2025
    Inventors: Chih-Chung KUO, Yung-Chieh KUO, Cheng-Tai PENG, Min-Wei TSAI, Sheng- Ming WANG, Jui-Hung LEE, Ke-Wei WEI, Ping-Yi LU, Shi-Hao WANG, Chih-Hsiang HSIAO
  • Patent number: 12291597
    Abstract: The present invention relates to a polybutylene terephthalate composition, and an article derived from the polybutylene terephthalate composition comprising as component (A) polybutylene terephthalate (PBT) resin, as component (B) vinyl aromatic-based polymer comprising units which are derived from vinyl aromatic monomers, and as component (C) reinforcement agent.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: May 6, 2025
    Assignee: BASF SE
    Inventors: Chao Liu, Qiong Jie Han, Roland Helmut Kraemer, Zhen Ke Wei
  • Publication number: 20250135439
    Abstract: Prior to reaction in an isomerization unit, the feed may be purified by contact with a composition comprising an alumina based catalyst including Group I or Group II cations or combinations thereof in a range from about 0 wt % to about 20 wt % Group I or Group II cations. In some embodiments, the alumina based catalyst has one or more of the following properties; pore volume in pores of less than 70 ? pore diameter of less than about 15% of Total Pore Volume: a pore volume in pores of greater than 350 ? pore diameter of less than 10% of Total Pore Volume; a median pore diameter by volume of less than 120 ?; a water pore volume of less than 1.10 cc/g;: and a surface area of greater than 160 m2/g.
    Type: Application
    Filed: February 18, 2022
    Publication date: May 1, 2025
    Inventors: Josiane Marie-Rose GINESTRA, Ke-Wei HUANG, David Anthony Grisafe, Sarah SCHIMMING, Cornelius Mark BOLINGER
  • Publication number: 20250133704
    Abstract: A cooling method for controlling a cooling system to cool a data center, the cooling system includes a chiller unit, a cooling tower, and at least one cooling water storage tank, the method includes determining whether the cooling system is under a first condition, a second condition, or a third condition; when the cooling system is under the first condition, controlling the chiller unit to provide cooling water to the data center; when the cooling system is under the second condition, controlling the chiller unit to provide cooling water to the data center and the at least one cooling water storage tank; and when the cooling system is under the third condition, controlling the at least one cooling water storage tank to provide cooling water to the data center and the chiller unit to refill cooling water to the at least one cooling water storage tank.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 24, 2025
    Inventors: YEN-CHUN FU, TZE-CHERN MAO, CHAO-KE WEI, CHIH-HUNG CHANG
  • Patent number: 12278104
    Abstract: The present disclosure relates to the technical field of semiconductors. Disclosed is a multi-layer semiconductor material structure and a preparation method thereof, solving the problems of the existing semiconductor materials that have poor heat dissipation, high cost, and cannot be mass-produced. The multi-layer semiconductor material structure includes a highly thermally conductive support substrate and a crystallized device function layer, where the device function layer is provided on the highly thermally conductive support substrate, and has a single-crystal surface layer.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 15, 2025
    Assignee: Institute of Microelectronics of the Chines Academy of Sciences
    Inventors: Fengwen Mu, Xinhua Wang, Sen Huang, Ke Wei, Xinyu Liu
  • Patent number: 12260098
    Abstract: An apparatus can include memory devices and a memory controller coupled to the memory devices via memory channels. The memory channels can disable a first memory channel associated with a first memory die in a respective memory chip of a memory device and perform a memory operation via a second memory channel involving a second memory die in the respective memory chip.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: March 25, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Yang Lu, Yu-Sheng Hsu, Kang-Yong Kim, Ke Wei Chan
  • Patent number: 12232301
    Abstract: A cooling system includes a control device, a chiller unit, a cooling tower, and an ice water storage tank. The chiller unit, the ice water storage tank, and the data center are coupled through a pipeline. According to a first condition, the chiller unit provides cooling water to the data center. According to a second condition, the chiller unit provides cooling water to the data center and the ice water storage tank. According to a third condition, the ice water storage tank provides cooling water to the data center and the chiller unit refills cooling water to the ice water storage tank, and heated water of the data center flows to the chiller unit.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: February 18, 2025
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: Yen-Chun Fu, Tze-Chern Mao, Chao-Ke Wei, Chih-Hung Chang
  • Patent number: 12210981
    Abstract: An approach is provided in which a method, system, and program product analyze, while training a machine learning model, a set of first data transformation operators in a first data preparation pipeline that generates a plurality of constructed features from a set of training data. The method, system, and program product create a plurality of second data preparation pipelines from the first data preparation pipeline, wherein the set of first data transformation operators are converted to a set of second data transformation operators and each assigned to one of the plurality of second data preparation pipelines. The method, system, and program product deploy the plurality of second data preparation pipelines to a runtime system.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: January 28, 2025
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ke Wei Wei, Hong Min, Shuang Ys Yu, Qi Zhang, Meichi Maggie Lin, Peter Bendel, Heng Liu
  • Patent number: 12200915
    Abstract: A temperature control device includes a temperature sensor configured to detect a temperature within a server. When the temperature in the server is below a preset temperature, the control unit controls an interior heating assembly to heat the server, and closes a ventilation assembly to retain heat within the server. When the temperature in the server has reached the preset temperature, the control unit controls the heating assembly to stop the internal heating, and controls the ventilation assembly to open, to allow dissipation of the heat from the server.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: January 14, 2025
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: Tze-Chern Mao, Li-Wen Chang, Yen-Chun Fu, Chih-Hung Chang, Yao-Ting Chang, Chao-Ke Wei
  • Patent number: 12159060
    Abstract: The present disclosure relates to a data writing method and apparatus of a NAND flash, and a storage medium. The method includes: for each channel in the NAND flash, pairing all logic units, namely LUNs, in the channel so that each LUN pair includes at least two LUNs; and for each LUN pair, sequentially writing data to one same page in a plurality of pages corresponding to a program mode included in each word line of each LUN in the LUN pair, and after completing data writing to the same page of the word line of all the LUNs in the LUN pair, sequentially writing data to a next same page in the plurality of pages of the word line of each LUN in the LUN pair, until the data writing is sequentially performed on a last same page in the plurality of pages of the word line of each LUN in the LUN pair. Therefore, the transmission efficiency of a NAND bus can be improved, and the data writing performance of the NAND flash can be improved.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: December 3, 2024
    Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
    Inventors: Tao Wei, Zhengtian Feng, Ke Wei
  • Publication number: 20240386181
    Abstract: A method of generating an IC layout diagram includes receiving the IC layout diagram including an active region, a gate region extending across the active region from a first active region edge to a second active region edge, and a gate via positioned at a location along the gate region between the first and second active region edges, calculating a gate resistance value based on the location and first and second active region edges, based on the resistance value, modifying the IC layout diagram by changing the location of the gate via along the gate region and/or adding another gate via positioned at another location along the gate region, and storing the modified IC layout diagram in a storage device.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Ke-Ying SU, Ke-Wei SU, Keng-Hua KUO, Lester CHANG
  • Publication number: 20240377352
    Abstract: Various embodiments of the present application are directed towards an ion-sensitive field-effect transistor for enhanced sensitivity. In some embodiments, a substrate comprises a pair of first source/drain regions and a pair of second source/drain regions. Further, a first gate electrode and a second gate electrode underlie the substrate. The first gate electrode is laterally between the first source/drain regions, and the second gate electrode is laterally between the second source/drain regions. An interconnect structure underlies the substrate and defines conductive paths electrically shorting the second source/drain regions and the second gate electrode together. A passivation layer is over the substrate and defines a first well and a second well. The first and second wells respectively overlie the first and second gate electrodes, and a sensing layer lines the substrate in the first and second wells. In some embodiments, sensing probes are in the first well, but not the second well.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Katherine H. Chiang, Jui-Cheng Huang, Ke-Wei Su, Tung-Tsun Chen, Wei Lee, Pei-Wen Liu
  • Patent number: 12141681
    Abstract: A one-shot neural architecture search method referred to as MergeNAS by merging different types of convolutions into a single operation. This mergence approach reduces the search cost to roughly half a GPU-day as well as alleviates the over-fitting problem caused by a traditional differentiable architecture search (DARTS) approach by reducing the number of redundant parameters.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: November 12, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xiaoxing Wang, Chao Xue, Yonggang Hu, Ke Wei Sun
  • Patent number: 12135930
    Abstract: A method of generating an IC layout diagram includes receiving the IC layout diagram including an active region, a gate region extending across the active region from a first active region edge to a second active region edge, and a gate via positioned at a location along the gate region between the first and second edges, configuring a delta resistance network including the first and second edges, a midpoint between the first and second edges, and resistance values based on the location and first and second edges, and performing a simulation based on the delta resistance network.
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: November 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ke-Ying Su, Ke-Wei Su, Keng-Hua Kuo, Lester Chang
  • Patent number: 12129375
    Abstract: The present invention relates to a polybutylene terephthalate composition, comprising as component (A) polybutylene terephthalate (PBT) resin, as component (B) polyester copolymer with melting point from 105° C. to 185° C., as component (C) vinyl-based polymer, and optionally as component (D) glass bubbles. The present invention also relates to a composite of plastic/metal hybrid, which comprises metal article and the polybutylene terephthalate composition of the present invention which is joined to and integrated with the metal article.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: October 29, 2024
    Assignee: BASF SE
    Inventors: Zhen Ke Wei, Qiong Jie Han, Chao Liu, Roland Helmut Kraemer, Dai Watanabe, Zhenguo Liu
  • Publication number: 20240315615
    Abstract: A detection element of biological subcutaneous features and a wearable device thereof are provided. The element for detecting biological subcutaneous features has a substrate, a light-detecting semiconductor chip, a grid structure, and a cover. The light-detecting semiconductor chip is located on the substrate for detecting red light or near-infrared light signals. The grid structure including a plurality of opaque light-absorbing blocking walls is located on the light-detecting semiconductor chip for blocking side light and increasing the proportion of near-vertical incident light. The cover is located on the grid structure and serves as a protection lid. The wearable device for detecting biological subcutaneous features has more than one light source of red light or near-infrared light and a plurality of detection elements. The arrangement of the opaque light-absorbing blocking walls that are parallel to each other are substantially parallel to the light-emitting directions of the light source.
    Type: Application
    Filed: March 19, 2024
    Publication date: September 26, 2024
    Inventors: Kai-Hung CHENG, Ku-Cheng LIN, Chun-Min LIN, Ke-Wei LIU
  • Publication number: 20240301162
    Abstract: The present invention relates to a polybutylene terephthalate composition, comprising (A) 40 to 99.8% by weight of polybutylene terephthalate, (B) 0.2 to 10% by weight of at least one conductive filler selected from the group consisting of carbon nanotubes, carbon nanostructures, and a combination thereof, and (C) 0 to 50% by weight of glass fiber, each being based on the total weight of the poly butylene terephthalate composition, wherein the carbon nanostructures each comprise a plurality of carbon nanotubes which are branched, crosslinked, and/or sharing common walls with one another. The present invention also relates to an EMI shielding article produced from the polybutylene terephthalate composition.
    Type: Application
    Filed: April 27, 2022
    Publication date: September 12, 2024
    Inventors: Li Xia Wang, Zhen Ke Wei, Tao Liu, Li Rong He
  • Publication number: 20240256012
    Abstract: An immersion cooling tank includes a tank body and a liquid flow tube. The tank body holds a coolant and an electronic device. The tank body defines an inlet and an outlet. The inlet and the outlet are respectively located at opposite ends of the electronic device for inputting and outputting the coolant. The coolant flows through the electronic device. The liquid flow tube includes at least one adjuster. The liquid flow tube is located inside the tank body and coupled to at least one of the inlet or the outlet. The at least one adjuster faces the electronic device for controlling an amount of the coolant flowing in or out of the tank body.
    Type: Application
    Filed: April 11, 2024
    Publication date: August 1, 2024
    Inventors: TZE-CHERN MAO, Yen-Chun Fu, Chih-Hung Chang, Yao-Ting Chang, Li-Wen Chang, Chao-Ke Wei
  • Publication number: 20240241098
    Abstract: A wall mountable sensor module includes a housing defining an internal space that is segmented into a first internal space and a second internal space. The first internal space defines an air channel that extends from an air inlet to an air outlet. Two or more sensors are configured to be exposed to the air flow channel. A first sensor is configured to detect a first air parameter and a second sensor is configured to detect a second different air parameter, wherein the second sensor is situated downstream of the first sensor in the air flow channel. The sensor module includes a fan housed by the housing, the fan configured to cause an airflow to flow in through the air inlet, through the air flow channel thereby exposing each of the sensors to the airflow, and out through the air outlet.
    Type: Application
    Filed: October 11, 2022
    Publication date: July 18, 2024
    Inventors: Chao Chen, Yu Zhi Yan, Hua Tang, Kaixuan Qin, Zhi Yi Sun, Jian Wang, Ke Wei Han, Qixiang Hu
  • Patent number: 12039915
    Abstract: The display drive circuit includes: an interface circuit for acquiring a plurality of grayscale data and a plurality of current gain data; a command processing circuit electrically coupled with the interface circuit; a cache circuit electrically coupled with the interface circuit and configured for caching the plurality of grayscale data and the plurality of current gain data; a current source circuit electrically coupled with the command processing circuit and including a plurality of channel current sources; a channel grayscale control circuit, electrically coupled with the command processing circuit, the cache circuit and the current source circuit, and configured for respectively controlling duration of turning on of the plurality of channel current sources according to the plurality of grayscale data; and a channel current control circuit electrically coupled with the cache circuit and the current source circuit, and configured for respectively controlling output currents of the plurality of channel curr
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: July 16, 2024
    Assignee: XI'AN TIBORS ELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Ke Wei, Defu Liu, Huorong Wang, Jingguo Zong