Abstract: A power supply circuit is provided. The power supply circuit includes an audio codec chip and a voltage absorbing circuit. The audio codec chip has a power input terminal. The power input terminal is connected to a power source terminal. The voltage absorbing circuit is connected between the power source terminal and the power input terminal of the audio codec chip so as to decrease a divided voltage accomplished with a voltage from the power source terminal to low level. A method configured for starting up an audio codec chip on a computer motherboard in a normal manner is also provided.

Abstract: A power supply circuit is capable of providing power to a video card chipset. The video card chipset includes a first power supply pin and a second power supply pin. The power supply circuit includes a power input, a first filtering circuit, and a second filtering circuit. The first filtering circuit is connected between the power source and the first power supply pin to filter the power provided to first power supply pin of the video card chipset. The second filtering circuit is connected between the power source and the second power supply pin to filter the power provided to second power supply pin of the video card chipset.

Abstract: A power supply circuit includes a voltage regulating module; a voltage selecting circuit and a voltage regulating chip. The voltage regulating module outputs corresponding control signals according to a type of a CPU installed on a motherboard. The voltage selecting circuit receives the control signals and converts the corresponding control signal to a voltage selecting signal. The voltage regulating chip receives the voltage selecting signal and outputs the corresponding working voltage to the CPU.

Abstract: A computer system includes a north bridge chip, a power source, and a resistor-capacitor filter circuit coupled between the power source and the north bridge chip. The north bridge chip has a digital-to-analog converter analog power pin and a digital-to-analog converter analog ground pin. The power source is coupled to the digital-to-analog converter analog power pin of the north bridge chip. The resistor-capacitor filter includes a first resistor and a first capacitor. The first resistor is connected between the power source and the digital-to-analog converter analog power pin of the north bridge chip. One end of the first capacitor is connected to the digital-to-analog converter analog power pin of the north bridge chip, and another end of the first capacitor is connected to ground together with the digital-to-analog converter analog ground pin of the north bridge chip.

Abstract: A power supply circuit includes a first power circuit having a first power output terminal and a first ground output terminal, a second power circuit having a second power output terminal and a second ground output terminal, and a SATA control chip having a first input terminal, a second input terminal, a third input terminal, and a fourth input terminal. The first power circuit comprises a first filter circuit. The second power circuit comprises a second filter circuit. The first power output terminal, first ground output terminal, second power output terminal, and second ground output terminal are electrically coupled to the SATA control chip via the first input terminal, second input terminal, third input terminal, and fourth input terminal respectively. The first and second power circuits provide power to the SATA control chip via the first and second filter circuits respectively.

Abstract: A computer system includes a power supply capable of generating a power good signal, a delay circuit configured to delay the power good signal, a Super I/O chip configured to receive the delayed power good signal; and a front side bus coupled with a terminal voltage signal. A delay time between the delayed power good signal and the terminal voltage signal is not less than a pre-set time limit.

Abstract: A circuit is used to process video signal from a video sensor. The video signal includes video content signal and synchronization signals. The circuit includes a status register, a data register, and a processor. The status register provides a sampling clock signal to the data register and the video sensor. The sampling clock signal is synchronized with the synchronization signals to sample the video signal. The status register stores the synchronization signals. The data register storing the video content signal. The processor is coupled to the status register and the data register. The processor reads the video content signal from the data register according to the synchronization signals in the status register.

Abstract: A power supply circuit for an audio codec chip includes a power supply output terminal configured for providing a working voltage for the audio codec chip, a first filter circuit, a regulator circuit, and a second filter circuit. The first filter circuit is coupled to the power supply output terminal. The regulator circuit has an input terminal and an output terminal. The regulator circuit input terminal is connected to the first filter circuit. The second filter circuit is connected to the regulator circuit output terminal, and is coupled to a power source input terminal of the audio codec chip.

Abstract: A power supply circuit for a motherboard includes an input/output (I/O) controller, a power circuit providing a working voltage for the I/O controller, and a first resistor. The I/O controller includes an I/O controller voltage pin and an I/O controller case open detection (COPEN) pin. The power circuit includes an input, a first output, a second output, and a GND pin. The input of the power circuit is connected to a standby power supply; and the first output of the power circuit is connected to the I/O controller voltage pin. The second output of the power circuit is connected to the I/O controller COPEN pin via the first resistor; and the GND pin of the power circuit is grounded.

Abstract: An exemplary circuit for preventing unauthorized access to a phone includes three transistors, a zener diode, and a rectifier comprising two input terminals for receiving an AC voltage from the telecommunication office, a negative output terminal connected to the phone via a first resistor, and a positive output terminal connected to the phone. The anode and the cathode of the zener diode are respectively connected to the positive output terminal and the base of the first transistor. The collectors of the first and third transistors are connected to the base of the second transistor, which is connected to the positive and negative output terminals respectively via two capacitors. The collectors of the first and second transistors are connected to the positive output terminal respectively via a second resistor and a buzzer. Emitters of the three transistors are connected to the negative output terminal of the rectifier.

Abstract: A clock signal generating circuit of a computer includes a first phase locked loop (PLL) circuit and a second PLL circuit. The computer includes a central processing unit (CPU) and a data bus. The first PLL provides a CPU clock signal to the CPU. A frequency of the CPU clock signal is the same as a working frequency of the CPU. The second PLL circuit provides a bus clock signal to the data bus. A frequency of bus clock signal is the same as a working frequency of the data bus. The data bus is to communicate with a graphic chip. The CPU clock signal is to control a working speed of the CPU. The bus clock signal is to control a working speed of the data bus.

Abstract: A power supply circuit includes a pulse width modulation (PWM) signal generator, a current adjustment unit, a drive unit, and a feedback unit. The PWM signal generator outputs a PWM voltage signal to the drive unit. The drive unit outputs a first control signal to control the current adjustment unit to work, and outputs a first direct current signal and a direct voltage signal. The current adjustment unit outputs a second direct current signal. A working current of the electrical device comes from the first and second direct current signals. The feedback unit generates a feedback voltage signal according to the direct voltage signal, and transmits the feedback voltage signal to the PWM signal generator to adjust the PWM voltage signal.

Abstract: A circuit for controlling a peripheral device interface is to enable a central processing unit to detect a peripheral device. The circuit includes a control chip and first to sixth capacitors. The control chip includes a power supply input pin, first to second differential signal output pins, first to second differential signal input pins, and an expansion pin. The power supply input pin is connected to a power supply and grounded via the first and second capacitors in parallel. The first and second differential signal output pins are connected to the peripheral device interface via the third and fourth capacitors respectively. The first and second differential signal input pins are connected to the peripheral device interface via the fifth and sixth capacitors respectively. The expansion pin is grounded via a resistor.

Abstract: A power supply circuit for a south bridge chip includes a voltage conversion chip having a first voltage input terminal, a second voltage input terminal, a driving voltage output terminal, and a gate voltage output terminal, a control circuit having a first control terminal, a second control terminal, and an output terminal, and a filter circuit coupled between the control circuit and the south bridge chip. The voltage conversion chip receives a first voltage and a second voltage from a power supply at the first and second voltage input terminals respectively, and outputs driving voltages at the driving voltage output terminal and gate voltage output terminal respectively. The control circuit receives the driving voltages at the first and second control terminals respectively, and outputs a working voltage to the south bridge chip via the filter circuit.

Abstract: A voltage monitoring device includes a comparison voltage generating circuit for providing a comparison voltage, a comparator, an electronic switch, and an LED. The comparator outputs a control signal in response to a comparing result between the comparison voltage and a voltage output by a power supply. The electronic switch includes a first terminal receiving the output of the comparator, a second terminal connected to a reference voltage, and a third terminal connected to ground. The LED includes an anode connected to the reference voltage, and a cathode connected to the second terminal of the first electronic switch.

Abstract: A card for simulating peripheral component interconnect (PCI) loads includes an interface configured for electrically connecting to a motherboard and a load circuit configured for simulating the different loads. The load circuit comprises at least one power module receiving a voltage from the interface. The power module is capable of changing resistance of the power module thereby to thermally consume various powers to simulate the different loads. Because the card consumes various power according to testing requirement, the stability of the motherboard can be tested in various load power without connecting actual PCI loads to the motherboard.

Abstract: An IEEE 1394 device detecting circuit includes a south bridge chip, a control device, an IEEE 1394 interface, and a resistor. The control device includes a power reset pin, a bus reset pin, and a cable power pin. The control device is connected to the south bridge chip through the bus reset pin, which is further connected to the power reset pin. The cable power pin is connected to a direct current power through the resistor. The control device is further connected to the IEEE 1394 interface, which is connected to an IEEE 1394 device.

Abstract: A power supply circuit for a motherboard includes a first resistor, a second resistor, a Schottky diode, and a direct current (DC) voltage source. The Schottky diode includes a first anode, a second anode, and a cathode. The first anode of the Schottky diode is respectively coupled to terminals of the first and second resistors, another terminal of each of the first and second resistors is respectively coupled to a power supply and ground. The second anode of the Schottky diode is coupled to the DC voltage source, the cathode of the Schottky diode is coupled to a south bridge.

Abstract: An exemplary computer enclosure includes a chassis, a pair of fixing members, a plurality of slats, and an actuating member. The chassis includes a pair of first parallel panels, and a second panel perpendicular to the first panels. The first panels and second panel cooperatively define an opening therebetween. The fixing members are attached to the first panels. The slats are pivotably attached to the first panels to adjustably shield the opening. Each of the slats includes a gear shaft fixed to an end thereof. The actuating member includes a rack bar slidably attached to one of the first panels to mesh with the gears shafts. The slats are rotatable clockwise or anticlockwise. Thus, the opening may be adjustably exposed to control an amount of air entering the chassis for dissipation of heat.

Abstract: A power supply circuit for a motherboard includes a VRM, a first NMOS transistor, a second NMOS transistor, a first capacitor, a first induction coil, and a delay circuit. A gate of the first NMOS transistor is connected to a UGATE pin of the VRM. A source of the first NMOS transistor is connected to a BOOT pin of the VRM via the first capacitor and a PHASE pin of the VRM, and connected to an MCH on the motherboard via the first induction coil. A drain of the first NMOS transistor is connected to a system power. A gate of the second NMOS transistor is connected to an LGATE pin of the VRM. A source of the second NMOS transistor is grounded. A drain of the second NMOS transistor is connected to the source of the first NMOS transistor and the delay circuit.