Patents by Inventor Kean Syn Cheah

Kean Syn Cheah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for gate oxide side-wall protection from plasma damage to form highly reliable gate dielectrics
    Patent number: 6475842
    Abstract: The present invention provides a method for manufacturing a semiconductor device. The method includes forming an oxidized portion of an initial gate structure and a sacrificial gate layer, and further includes removing the oxidized portion of the initial gate structure and the sacrificial gate layer to form a transistor device. In an exemplary embodiment, the method further includes subjecting a patterned gate layer to an etch to form the initial gate structure and the sacrificial layer. In an advantageous embodiment, the gate layer is patterned having a width greater than a predetermined design width.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: November 5, 2002
    Assignee: Agere Systems Inc.
    Inventors: Kean Syn Cheah, Hooi Peng Low, Yi Ma