Patents by Inventor Kedar ATHAWALE

Kedar ATHAWALE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10802875
    Abstract: Various aspects are described herein. In some aspects, the disclosure provides a method for a system-on-chip (SoC) including one or more computing cores. The method includes providing a scheduler to schedule running of threads on the one or more computing cores in a pre-boot environment including a core thread configured to provide a plurality of services. The method further includes providing, by the scheduler, a first lock for the core thread. The method further includes initializing, by the core thread, one or more additional services separate from the plurality of services. The method further includes selectively allowing access to the plurality of services of the core thread to one or more additional threads based on a status of the first lock. The method further includes allowing access to the one or more additional services to the one or more additional threads independent of the status of the first lock.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: October 13, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Yugandhar Narayana, Dhamim Packer Ali, Ajay Iyengar, Kedar Athawale, Eric Tallet
  • Publication number: 20190332425
    Abstract: Various aspects are described herein. In some aspects, the disclosure provides a method for a system-on-chip (SoC) including one or more computing cores. The method includes providing a scheduler to schedule running of threads on the one or more computing cores in a pre-boot environment including a core thread configured to provide a plurality of services. The method further includes providing, by the scheduler, a first lock for the core thread. The method further includes initializing, by the core thread, one or more additional services separate from the plurality of services. The method further includes selectively allowing access to the plurality of services of the core thread to one or more additional threads based on a status of the first lock. The method further includes allowing access to the one or more additional services to the one or more additional threads independent of the status of the first lock.
    Type: Application
    Filed: November 28, 2018
    Publication date: October 31, 2019
    Inventors: Yugandhar NARAYANA, Dhamim PACKER ALI, Ajay IYENGAR, Kedar ATHAWALE, Eric TALLET