Patents by Inventor Kedar DHANE

Kedar DHANE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200203254
    Abstract: An integrated circuit package that includes a liquid phase thermal interface material (TIM) is described. The package may include any number of die. The liquid phase TIM can be sealed in a chamber between a die and an integrated heat spreader and bounded on the sides by a perimeter layer. The liquid phase TIM can be fixed in place or circulated, depending on application. A thermal conductivity of the liquid phase TIM can be at least 15 Watts/meter-Kelvin, according to some embodiments. A liquid phase TIM eliminates failure mechanisms present in solid phase TIMs, such as cracking due to warpage and uncontained flow out of the module.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 25, 2020
    Applicant: INTEL CORPORATION
    Inventors: Kedar Dhane, Omkar Karhade, Aravindha R. Antoniswamy, Divya Mani
  • Publication number: 20200203470
    Abstract: A conductive metal pillar is disposed within a composite material used as a die overflow material to form inductor on a module substrate. In situ fabrication of inductors on a module substrate enable customized selection of an inductance value, thus enabling inductors (and other similar peripheral devices) to be placed on a module substrate rather than on a motherboard. Furthermore, these in situ fabricated peripheral devices may also be used to remove excess heat produced by a die because the magnetic particles of the composite material are also thermally conductive. Furthermore, electrically conductive elements of the peripheral devices can be placed in contact with the die and/or integrated heat spreader.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 25, 2020
    Applicant: INTEL CORPORATION
    Inventors: Kedar Dhane, Malavarayan Sankarasubramanian, Yongki Min, William J. Lambert
  • Patent number: 10461003
    Abstract: An electronic package that includes a substrate; a die attached to the substrate; an underfill positioned between the die and the substrate due to capillary action; a first support adjacent to the die and attached to the substrate; and a second support mounted on the first support, wherein the second support is closer to the die than the first support, wherein first support surrounds the die and the second support surrounds the die, and wherein the second support is a different material than the first support. The die may be flip chip bonded to the substrate and the underfill may secure the die to the substrate. The first support may be attached to the substrate using an adhesive and the second support may be attached to the first support using an adhesive.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: October 29, 2019
    Assignee: Intel Corporation
    Inventors: Omkar Karhade, Kedar Dhane
  • Patent number: 10290561
    Abstract: A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired network attached to an inner surface of the heat spreader lid. An IC package may include a heat spreader lid placed over a first electronic component and a second electronic component. A first thermal interface may be formed between the first electronic component and the inner surface of the heat spreader lid, and a second thermal interface may be formed between the second electronic component and the inner surface of the heat spreader lid. The first thermal interface may include a wired network of a first TIM surrounded by a second TIM, while the second thermal interface may include the second TIM, without a wired network of the first TIM. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: May 14, 2019
    Assignee: Intel Corporation
    Inventors: Edvin Cetegen, Omkar G. Karhade, Kedar Dhane, Chandra M. Jha
  • Patent number: 10157860
    Abstract: Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a stiffener on a substrate, wherein a first section of the stiffener and a second section of the stiffener are on opposite sides of an opening. At least one component may be attached on the substrate within the opening, wherein the at least one component is disposed between the first section of the stiffener and the second section of the stiffener, and wherein the stiffener comprises a grounding structure disposed on the substrate.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: December 18, 2018
    Assignee: Intel Corporation
    Inventors: Omkar G. Karhade, Kedar Dhane, Yongki Min, William J. Lambert
  • Publication number: 20180358274
    Abstract: An electronic package that includes a substrate; a die attached to the substrate; an underfill positioned between the die and the substrate due to capillary action; a first support adjacent to the die and attached to the substrate; and a second support mounted on the first support, wherein the second support is closer to the die than the first support, wherein first support surrounds the die and the second support surrounds the die, and wherein the second support is a different material than the first support. The die may be flip chip bonded to the substrate and the underfill may secure the die to the substrate. The first support may be attached to the substrate using an adhesive and the second support may be attached to the first support using an adhesive.
    Type: Application
    Filed: November 11, 2016
    Publication date: December 13, 2018
    Inventors: Omkar Karhade, Kedar Dhane
  • Publication number: 20180182718
    Abstract: Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a stiffener on a substrate, wherein a first section of the stiffener and a second section of the stiffener are on opposite sides of an opening. At least one component may be attached on the substrate within the opening, wherein the at least one component is disposed between the first section of the stiffener and the second section of the stiffener, and wherein the stiffener comprises a grounding structure disposed on the substrate.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 28, 2018
    Applicant: Intel Corporation
    Inventors: Omkar G. Karhade, Kedar Dhane, Yongki Min, William J. Lambert
  • Publication number: 20180090411
    Abstract: A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired network attached to an inner surface of the heat spreader lid. An IC package may include a heat spreader lid placed over a first electronic component and a second electronic component. A first thermal interface may be formed between the first electronic component and the inner surface of the heat spreader lid, and a second thermal interface may be formed between the second electronic component and the inner surface of the heat spreader lid. The first thermal interface may include a wired network of a first TIM surrounded by a second TIM, while the second thermal interface may include the second TIM, without a wired network of the first TIM. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 28, 2016
    Publication date: March 29, 2018
    Inventors: Edvin Cetegen, Omkar G. Karhade, Kedar Dhane, Chandra M. Jha
  • Patent number: 9799610
    Abstract: Creating surface variations on a stiffener in a stack reduces inter-stiffener sticking and stiffener stack tilt in pick and place media. The surface variations provide one or more airgaps that reduce inter-stiffener surface contact, provide space for contaminants and/or provide an averaged surface height due to surface roughness.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: October 24, 2017
    Assignee: INTEL CORPORATION
    Inventors: Mingjie Xu, Suzana Prstic, Kedar Dhane
  • Publication number: 20170179043
    Abstract: Creating surface variations on a stiffener in a stack reduces inter-stiffener sticking and stiffener stack tilt in pick and place media. The surface variations provide one or more airgaps that reduce inter-stiffener surface contact, provide space for contaminants and/or provide an averaged surface height due to surface roughness.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Applicant: INTEL CORPORATION
    Inventors: Mingjie Xu, Suzana Prstic, Kedar Dhane
  • Publication number: 20170170087
    Abstract: An electronic package that includes a substrate; a die attached to the substrate; an underfill positioned between the die and the substrate due to capillary action; a first support adjacent to the die and attached to the substrate; and a second support mounted on the first support, wherein the second support is closer to the die than the first support, wherein first support surrounds the die and the second support surrounds the die, and wherein the second support is a different material than the first support. The die may be flip chip bonded to the substrate and the underfill may secure the die to the substrate. The first support may be attached to the substrate using an adhesive and the second support may be attached to the first support using an adhesive.
    Type: Application
    Filed: December 14, 2015
    Publication date: June 15, 2017
    Inventors: Omkar Karhade, Kedar Dhane
  • Publication number: 20160268213
    Abstract: An apparatus including a package including a die and a package substrate, the package substrate including a conductor; and a stiffener body electrically coupled to the conductor of the package substrate. An apparatus including a package including a die and a package substrate; a stiffener body coupled to the package substrate; and an electrically conductive path between the stiffener body and the package substrate. A method including electrically coupling a stiffener body to a conductor of a package substrate.
    Type: Application
    Filed: March 9, 2015
    Publication date: September 15, 2016
    Inventors: Hongjin JIANG, Robert STARKSTON, Digvijay A. RAORANE, Keith D. JONES, Ashish DHALL, Omkar G. KARHADE, Kedar DHANE, Suriyakala RAMALINGAM, Li-Sheng WENG, Robert F. CHENEY, Patrick N. STOVER