Abstract: A liquid crystal display includes: a thin film transistor array panel; a counter panel opposite to the thin film transistor array panel; a liquid crystal layer between the thin film transistor array panel and the counter panel; and pixel electrodes in the thin film transistor array panel, where each of the pixel electrodes includes a first sub-pixel electrode and a second sub-pixel electrode, where each of the first and second sub-pixel electrodes is divided into sub-regions by domain dividers, which controls pretilt angles of liquid crystal molecules of the liquid crystal layer, vertically adjacent pixel electrodes includes an upper pixel electrode and a lower pixel electrode, and the pretilt angles of the liquid crystal molecules in two bottom sub-regions of the second sub-pixel electrode of the upper pixel electrode and in two top sub-regions of the first sub-pixel electrode of the lower pixel electrode are opposite to each other.

Abstract: Provided is a liquid crystal display capable of reducing a texture by increasing a liquid crystal control ability. The liquid crystal display includes a first electrode and a second electrode facing each other with a liquid crystal layer therebetween. The first electrode includes a horizontal extension forming a boundary between adjacent subregions and a vertical extension connected to the horizontal extension, and the horizontal extension includes a portion which has a largest width at a position proximate to the vertical extension, and which has a smaller width at a position farther from the vertical extension.

Abstract: A substantially rectangular display panel includes a first edge extending in a first major axis direction of the rectangular shape and a second edge extending in a second major axis direction of the rectangular shape, the second direction being different from the first direction. The display panel includes: a plurality of gate lines extending in the first direction; and a gate lines driver including a plurality of main stages sequentially connected to each other and configured for outputting gate signals to the gate lines, where the plurality of stages further includes one or more dummy stages arranged in a row along the second edge and not connected to the plurality of gate lines, and where a layout arrangement of a plurality of thin film transistors included in the main stage is different from a corresponding layout arrangement of corresponding thin film transistors included in the at least one dummy stage.

Abstract: A thin film transistor according to the present inventive concept includes: a first and a second pixel electrodes that are electrically connected to the drain electrode through the contact hole and disposed to be adjacent to each other in a column direction, wherein the first pixel electrode includes a first sub-pixel electrode and a second sub-pixel electrode that include a vertical stem part, a horizontal stem part, and a plurality of minute branches, the second pixel electrode includes a third sub-pixel electrode and a fourth sub-pixel electrode that include a vertical stem part, a horizontal stem part, and a plurality of minute branches, and the plurality of minute branches of the second sub-pixel electrode and the plurality of minute branches of the third sub-pixel electrode that are adjacent to each other to each other in the column direction form an angle of 45° or more to 135° or less.

Abstract: A thin film transistor array panel includes a first subpixel electrode and a second subpixel electrode electrically connected with a drain electrode through a first contact hole and a second contact hole, respectively. The first subpixel electrode and the second subpixel electrode include a plurality of vertical stems, a plurality of horizontal stems, and a plurality of branch electrodes. The first subpixel electrode is formed above a gate line and the second subpixel electrode is formed below a gate line. The thin film transistor array panel further includes a first protrusion formed in the plurality of vertical stems of the first subpixel electrode and the plurality of vertical stems of the second subpixel electrode.

Abstract: Provided is a liquid crystal display (LCD), the LCD includes: an insulating substrate; a first gate line and a second gate line which are formed on the insulating substrate and extend parallel to each other; a data line formed on the insulating substrate, insulated from the first and second gate lines, and crossing the first and second gate lines; a first subpixel electrode connected to the first gate line and the data line by a first switching device and includes a plurality of first fine protruding patterns at an edge thereof; and a second subpixel electrode connected to the second gate line and the data line by a second switching device and including a plurality of second fine protruding patterns at an edge thereof, wherein the first fine protruding patterns are separated from each other by a first gap, and the second fine protruding patterns are separated from each other by a second gap, wherein the sum of a width of the first gap and a width of each of the first fine protruding patterns is greater than t

Abstract: A substantially rectangular display panel includes a first edge extending in a first major axis direction of the rectangular shape and a second edge extending in a second major axis direction of the rectangular shape, the second direction being different from the first direction. The display panel includes: a plurality of gate lines extending in the first direction; and a gate lines driver including a plurality of main stages sequentially connected to each other and configured for outputting gate signals to the gate lines, where the plurality of stages further includes one or more dummy stages arranged in a row along the second edge and not connected to the plurality of gate lines, and where a layout arrangement of a plurality of thin film transistors included in the main stage is different from a corresponding layout arrangement of corresponding thin film transistors included in the at least one dummy stage.

Abstract: A liquid crystal display includes a plurality of pixels arranged in a matrix, each pixel having a first sub-pixel electrode and a second sub-pixel electrode. A first thin film transistor is connected to the first sub-pixel electrode. A second thin film transistor is connected to the second sub-pixel electrode. A third thin film transistor is connected to the second sub-pixel electrode. A fourth thin film transistor is connected to a drain electrode of the third thin film transistor. A first gate line is connected to the first thin film transistor and the second thin film transistor. A data line is connected to the first thin film transistor and the second thin film transistor. A second gate line is connected to the third thin film transistor. A third gate line is connected to the fourth thin film transistor.

Abstract: A liquid crystal display device includes a first substrate, a gate line disposed on the first substrate, a data line disposed on the first substrate and intersecting the gate line, and a pixel electrode disposed in a pixel region at least partially defined by the gate line and the data line, and overlapping the data line, the pixel electrode including first and second sub-pixel electrodes separated from each other. Each of the first and second sub-pixel electrodes includes a horizontal stem extending in a direction intersecting the data line, and branches connected to the horizontal stem.

Abstract: Provided is a liquid crystal display capable of reducing a texture by increasing a liquid crystal control ability. The liquid crystal display includes a first electrode and a second electrode facing each other with a liquid crystal layer therebetween. The first electrode includes a horizontal extension forming a boundary between adjacent subregions and a vertical extension connected to the horizontal extension, and the horizontal extension includes a portion which has a largest width at a position proximate to the vertical extension, and which has a smaller width at a position farther from the vertical extension.

Abstract: A display device includes a display substrate, on which a display area and a non-display area are defined, a plurality of gate lines arranged in the display area to extend in a first direction, a gate driving unit including a plurality of stages which outputs gate signals to the plurality of gate lines, and a plurality of pixel rows disposed in the display area and connected to the plurality of gate lines, where a driving area and an electrode area are defined in the display area between two adjacent pixel rows in a second direction among the plurality of pixel rows, at least a part of the plurality of stages is disposed in the driving area, and a compensation electrode is disposed in the electrode area.

Abstract: A display device includes a plurality of gate lines arranged substantially parallel to each other in a first direction; a plurality of charge share gate lines arranged substantially parallel to each other in the first direction; a plurality of data lines arranged substantially parallel to each other in a second direction, wherein the second direction is substantially perpendicular to the first direction; and a plurality of pixels arranged in a matrix form in along the first direction and the second direction and each of the plurality of pixels which includes a first switching element and a second switching element, wherein the a first gate line of the plurality of gate lines is electrically connected to the first switching element included in one individual pixel of the plurality of pixels, and the a second gate line of the plurality of gate lines is electrically connected to the second switching element included in the individual pixel of the plurality of pixels.

Abstract: There is provided a display device. The display device includes a display panel divided into a display region and a non-display region, with the display region having data lines, scan lines, and pixels connected to the data lines and the scan lines. The display device include a data driver to output data voltage to the data lines, and a scan driver to sequentially output scan signals to the scan lines. The display region is divided into a first region and a second region. A first portion of the scan driver is formed in the non-display region, while a second portion of the scan driver is formed in the first region. A pixel of the pixels formed in the first region comprises a single pixel electrode, and a pixel of the pixels formed in the second region comprises a plurality of pixel electrodes.

Abstract: A display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines are disposed at a position outside a region of overlap of the conductive member. Accordingly, the capacitances between the signal lines may be substantially the same.

Abstract: A curved display device includes a display substrate curved in a first direction and including a plurality of pixel areas, and each of the plurality of pixel areas including a first sub-pixel area and a second sub-pixel area, an opposite substrate facing the display substrate, the opposite substrate coupled to the display substrate and curved in the first direction together with the display substrate, and a liquid crystal layer interposed between the display substrate and the opposite substrate, where first domains are defined in the first sub-pixel area along a second direction crossing the first direction, second domains are defined in the second sub-pixel area along the second direction, and a width in the second direction of each of the first domains is equal to a width in the second direction of each of the second domains.

Abstract: A thin film transistor display panel includes: a substrate; a gate line and a storage electrode line on the substrate; a gate insulating layer on the gate line; a semiconductor layer on the gate insulating layer; a data line, a drain electrode and a divided-voltage reference voltage line on the semiconductor layer; a passivation layer covering the data line, the drain electrode and the divided-voltage reference voltage line; and a first sub-pixel electrode and a second sub-pixel electrode electrically connected to the drain electrode through a contact hole defined in the passivation layer and including a plurality of pixel branch electrodes, where the divided-voltage reference voltage line divides a first or second sub-pixel area, which is defined by the first or second sub-pixel electrode, into two regions, and each of the two regions has three sides defined by the divided-voltage reference voltage line and an open side.

Abstract: A liquid crystal display (“LCD”) has first, second, and third pixels adjacent to one another in a column direction. The LCD includes a first gate line connected to each of the second and third pixels in common, a capacitance electrode line connected to each of the first and second pixels in common, a first data line connected to the second pixel, and a second data line connected to the first and third pixels.

Abstract: A liquid crystal display includes a substrate, a gate line, a data line, first and second reference voltage lines disposed on the substrate, first and second subpixel electrodes disposed in one pixel area, and first to third switching elements. The first and second reference voltage lines apply first and second reference voltages. The first and second subpixel electrodes include a plate portion and a plurality of branch portions extending from the plate portion. The first and second reference voltage lines include a first portion overlapping the first subpixel electrode and the second subpixel electrode. The first portion overlaps the plate portion of the first and second subpixel electrodes. A voltage difference between the first subpixel electrode and a common voltage is larger than a voltage difference between the second subpixel electrode and the common voltage.

Abstract: A data driving apparatus includes a first data driver and a second data driver. The first data driver is configured to generate data signals to data lines of a display panel, and includes data pads configured to output the data signals, a first common voltage pad configured to output a common voltage to the display panel, and a gate driving signal pad configured to output a gate driving signal to a gate driver, which is configured to output a gate signal to a gate line of the display panel. The second data driver is disposed between two first data drivers; is configured to generate the data signal provided to the data line; and includes a second common voltage pad configured to output the common voltage to the display panel. Thus, a width of a bezel of the display apparatus may be decreased.

Abstract: An array substrate includes a lower substrate, a switching element and a pixel electrode. In the lower substrate, unit pixel areas are each divided into a plurality of domains. The switching element is disposed on the lower substrate and transmits a pixel signal. The pixel electrode is disposed on the unit pixel area and is electrically connected to the switching element. The pixel electrode includes a plurality of branch portions disposed thereon. A portion of the branch portions is longitudinally extended in a zigzag shape along different directions in correspondence with the domains.