Patents by Inventor Kee Moon

Kee Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10331256
    Abstract: A sensitivity compensation method of a touch input device sensing a touch pressure may be provided. The sensitivity compensation method includes: defining a plurality of reference points spaced apart from each other on a touch sensor panel; generating a reference data corresponding to a capacitance change amount sensed by applying a predetermined pressure to the plurality of reference points; generating, on the basis of the reference data, an interpolated data corresponding to a capacitance change amount for a random point present between the plurality of reference points; calculating, on the basis of the generated reference data and interpolated data, with respect to the reference point and random point respectively, a compensation factor for compensating a sensitivity of the touch input device to a target value; and compensating uniformly for the sensitivity of the touch input device by applying the calculated compensation factor to each corresponding points.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: June 25, 2019
    Assignee: HiDeep Inc.
    Inventors: Ho Jun Moon, Bon Kee Kim, Se Yeob Kim, Bong Jin Seo, Tae Hoon Kim, Myung Jun Jin
  • Patent number: 10331268
    Abstract: A sensitivity compensation method of a touch input device sensing a touch pressure may be provided. The sensitivity compensation method includes: detecting a capacitance change amount by applying a pressure to a plurality of points defined on a touch sensor panel; generating a raw data for the capacitance change amount of the defined point; generating a decimal value data for each of the sets by dividing a data value within the set by a maximum value within the set; calculating an average value of each defined point; generating a representative value data by calculating a value corresponding to all the points of the touch sensor panel; calculating a balance factor on the basis of the representative value data; and compensating for a touch pressure sensitivity of the touch input device by using the balance factor.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: June 25, 2019
    Assignee: HiDeep Inc.
    Inventors: Tae Hoon Kim, Sang Sic Yoon, Se Yeob Kim, Bon Kee Kim, Ho Jun Moon, Seon Dong Kwak
  • Patent number: 10313971
    Abstract: An apparatus, method, chipset, and non-transitory computer-readable storage medium for controlling power are provided. The apparatus includes a receiver configured to receive a data frame and first information related to a next data frame of the data frame; and a controller configured to determine an operation mode as an active mode or a sleep mode based on destination address information of the next data frame and duration information indicating a time during which transmission of the next data frame occurs, wherein the destination address information and the duration information are included in the first information.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: June 4, 2019
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Sang-Ho Seo, Kee-Moon Chun, Jun-Ho Huh
  • Patent number: 10109796
    Abstract: Disclosed herein, in certain embodiments, is a method of depositing a polymer onto a surface. In some embodiments, the method comprises using a high electric field and a high frequency vibratory motion to deposit a polymer solution onto the surface. Disclosed herein, in certain embodiments, is a method of manufacturing an electrode or diode. In some embodiments, the method comprises using a high electric field and a high frequency vibratory motion to deposit a polymer onto a surface. Further disclosed herein, in certain instances, is an electrode manufactured by any method disclosed herein. Further disclosed herein, in certain instances, is a diode manufactured by any method disclosed herein.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: October 23, 2018
    Assignee: San Diego State University Research Foundation
    Inventor: Kee Moon
  • Patent number: 10084079
    Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: September 25, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun Yoo, Kwan-Young Kim, Jin-Hyun Noh, Kee-Moon Chun, Yong-Woo Jeon
  • Patent number: 10056479
    Abstract: A semiconductor device has reduced ON resistance (Ron) as well as a reduced electric field emanating from a current path. The semiconductor device includes a fin pattern, a gate electrode intersecting the fin pattern, a source region which has a first conductivity type and is disposed on one side of the gate electrode, a body region which has a second conductivity type, is situated within the fin pattern under the source region, and extends in a loop around the source region, a drain region which has the first conductivity type and is disposed on the other side of the gate electrode, a field dispersion region which has the second conductivity type and is situated within the fin pattern between the gate electrode and the drain region, and a drift region which has the first conductivity type, is situated within the fin pattern under the drain region and the field dispersion region, and extends in a loop around the drain region and the field dispersion region.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: August 21, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun Yoo, Jin-Hyun Noh, Kee-Moon Chun, Jong-Sung Jeon
  • Publication number: 20180161871
    Abstract: The invention relates to a product and a process for fabricating a 1D, 2D, or 3D layered micro or nano component that comprises providing an electrode having a micro-scale or nano-scale tip, and applying electric current to the electrode tip in the presence of a micro-scale or nano-scale powder.
    Type: Application
    Filed: September 6, 2013
    Publication date: June 14, 2018
    Applicant: SAN DIEGO STATE UNIVERSITY RESEARCH FOUNDATION
    Inventors: Khaled Morsi, Kee Moon
  • Patent number: 9893053
    Abstract: A semiconductor device including an electrostatic discharge (ESD) protection circuit includes an input port, a logic circuit receiving an input signal applied to the input port and generating an output signal based on the input signal, and an ESD protection circuit adjusting a level of the input signal when the level of the input signal exceeds a predetermined range.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: February 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Hyun Yoo, Kee-Moon Chun
  • Publication number: 20170169256
    Abstract: A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.
    Type: Application
    Filed: February 14, 2017
    Publication date: June 15, 2017
    Inventors: Hyuck-Jun CHO, Donald NA, Seung-Hwan BAEK, Jae-Keun OH, Kee-Moon CHUN
  • Patent number: 9589221
    Abstract: A smart card may include data storage and transmission circuitry, a plurality of voltage controllers to supply operational power to card circuitry, a plurality of oscillators to supply an internal clock for the card, and power management circuitry. The power management circuitry may be configured to shut down the oscillators and at least one, but not all, voltage controllers during a period after a data transmission is completed.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: March 7, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuck-Jun Cho, Donald Na, Seung-Hwan Baek, Jae-Keun Oh, Kee-Moon Chun
  • Publication number: 20160372593
    Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.
    Type: Application
    Filed: February 24, 2016
    Publication date: December 22, 2016
    Inventors: Jae-Hyun YOO, Kwan-Young Kim, Jin-Hyun Noh, Kee-Moon Chun, Yong-Woo Jeon
  • Patent number: 9519487
    Abstract: A system-on-chip (SoC) includes a slave intellectual property (IP) block, a master IP block, and an update control unit. The slave IP block is configured to perform first processing on first data based on first control information stored in a first storage unit. The master IP block is configured to perform second processing on second data in response to receiving a first processing result obtained by performing the first processing on the first data. Performing the second processing is based on second control information stored in a second storage unit. The update control unit is configured to determine an update time of the first control information or an update time of the second control information in response to performing the first processing and performing the second processing.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: December 13, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Han Lee, Sung-Chul Yoon, Sung-Hoo Choi, Jae-Sop Kong, Kee-Moon Chun
  • Publication number: 20160315029
    Abstract: There is provided a semiconductor package including: a semiconductor chip; and an extension die provided on the semiconductor chip, wherein the semiconductor chip includes a heating point configured to generate a temperature greater than or equal to a pre-determined reference temperature in the semiconductor chip, the heating point provided in a center region of the extension die
    Type: Application
    Filed: February 9, 2016
    Publication date: October 27, 2016
    Inventors: Dong-Han LEE, Je-Gil MOON, Wook KIM, Min-Seon AHN, Yun-Hyeok IM, Kee-Moon CHUN, Jae-Soo CHAUNG, Bum-Keun CHOI, Jung-Su HA
  • Patent number: 9436833
    Abstract: A security circuit may include a functional circuit including a test chain that connects flip-flops to verify hardware of the functional circuit, the functional circuit configured to generate an output signal by encrypting an input signal based on a control signal, a mode signal, and the chain; and/or a test controller configured to generate the input, control, and mode signals, and configured to generate an authentication result based on the output signal. A security circuit may include a first device including a plurality of flip-flops in a test chain, the first device configured to receive first, second, and third signals, and configured to generate a fourth signal by encrypting the first signal based on the second and third signals and the chain; and/or a second device configured to generate the first, second, and third signals, and configured to generate an authentication result based on the fourth signal.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: September 6, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Myung Na, Kee-Moon Chun
  • Patent number: 9424807
    Abstract: A multimedia system includes a main special function register (SFR) configured to store SFR information; a plurality of processing modules each configured to process frames of data, based on the SFR information; and a system control logic configured to control operations of the main SFR and the plurality of processing modules. The plurality of processing modules may process data of different frames at the same time period.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: August 23, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong Han Lee, Sung Hoo Choi, Jae Sop Kong, Sung Chul Yoon, Kee Moon Chun
  • Publication number: 20160225896
    Abstract: A semiconductor device has reduced ON resistance (Ron) as well as a reduced electric field emanating from a current path. The semiconductor device includes a fin pattern, a gate electrode intersecting the fin pattern, a source region which has a first conductivity type and is disposed on one side of the gate electrode, a body region which has a second conductivity type, is situated within the fin pattern under the source region, and extends in a loop around the source region, a drain region which has the first conductivity type and is disposed on the other side of the gate electrode, a field dispersion region which has the second conductivity type and is situated within the fin pattern between the gate electrode and the drain region, and a drift region which has the first conductivity type, is situated within the fin pattern under the drain region and the field dispersion region, and extends in a loop around the drain region and the field dispersion region.
    Type: Application
    Filed: January 12, 2016
    Publication date: August 4, 2016
    Inventors: Jae-Hyun YOO, Jin-Hyun NOH, Kee-Moon CHUN, Jong-Sung JEON
  • Patent number: 9403912
    Abstract: The present invention relates to anti-ErbB2 antibody variants or antigen-binding fragments thereof, nucleic acid molecules encoding them, and their uses. The antibody variants of the present invention are capable of binding to ErbB2 with high affinity. Therefore, the antibody variants are ability to effectively prevent or treat various cancers with a low amount.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: August 2, 2016
    Assignee: CHONG KUN DANG PHARMACEUTICAL CORP.
    Inventors: Seung-Kee Moon, So-Ra Park, Ki-Young An
  • Publication number: 20160212705
    Abstract: An apparatus, method, chipset, and non-transitory computer-readable storage medium for controlling power are provided. The apparatus includes a receiver configured to receive a data frame and first information related to a next data frame of the data frame; and a controller configured to determine an operation mode as an active mode or a sleep mode based on destination address information of the next data frame and duration information indicating a time during which transmission of the next data frame occurs, wherein the destination address information and the duration information are included in the first information.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 21, 2016
    Inventors: Sang-Ho Seo, Kee-Moon Chun, Jun-Ho Huh
  • Patent number: 9395777
    Abstract: A system-on-chip (SoC) which includes a plurality of intellectual properties (IP cores) which communicate data with a memory device operates by monitoring whether a data transaction occurs between at least one of the IP cores and the memory device, determining an operation state of the IP core according to the result of the monitoring, and supplying the IP core with power corresponding to the operation state of the IP core.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: July 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo Yong Kim, Ju Hwan Kim, Jun Ho Huh, Kee Moon Chun
  • Patent number: D762210
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: July 26, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kee Moon Lee, Tae Joong Kim, Seog Guen Kim