Patents by Inventor Kee Park

Kee Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8059439
    Abstract: An encoding scheme is disclosed that allows a CAM device to selectively store, within each cell of a row of the CAM device, either a single bit of a binary value or two bits of an encoded data word encoded from the binary value. By storing two bits of the encoded data word in each CAM cell, data may be stored more efficiently and CAM systems may consume less power. The encoded data words can be balanced data words that have equal number of logic high and logic low values.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: November 15, 2011
    Assignee: NetLogic Microsystems, Inc.
    Inventor: Kee Park
  • Publication number: 20110255322
    Abstract: An encoding scheme is disclosed that allows a CAM device to selectively store, within each cell of a row of the CAM device, either a single bit of a binary value or two bits of an encoded data word encoded from the binary value. By storing two bits of the encoded data word in each CAM cell, data may be stored more efficiently and CAM systems may consume less power. The encoded data words can be balanced data words that have equal number of logic high and logic low values.
    Type: Application
    Filed: June 27, 2011
    Publication date: October 20, 2011
    Inventor: Kee Park
  • Patent number: 8023298
    Abstract: Approaches for an improved encoding scheme that allows a CAM device to selectively store, within each cell of a row of the CAM device, either a single bit of a binary value or two bits of an encoded data word encoded from the binary value. By storing two bits of the encoded data word in each CAM cell, data may be stored more efficiently and CAM systems may consume less power as compared to traditional binary CAMS when performing certain types of operations, such as exact matching and longest prefix matching. Encoded data words may be, but need not be, balanced data words which have equal number of logic high and logic low values.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: September 20, 2011
    Assignee: NetLogic Microsystems, Inc.
    Inventor: Kee Park
  • Patent number: 7881090
    Abstract: A read operation and a search operation are performed during the same cycle within a CAM system including a CAM array by: (1) forcing a non-matching condition to exist in the row of the CAM array selected for the read operation, (2) comparing the read data value with the search data value outside of the CAM array to determine whether a match exists, and (3) prioritizing the results of the search operation performed within the CAM array and the results of the comparison performed outside of the CAM array to provide a final search result.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: February 1, 2011
    Assignee: NetLogic Microsystems, Inc.
    Inventor: Kee Park
  • Publication number: 20100232195
    Abstract: A read operation and a search operation are performed during the same cycle within a CAM system including a CAM array by: (1) forcing a non-matching condition to exist in the row of the CAM array selected for the read operation, (2) comparing the read data value with the search data value outside of the CAM array to determine whether a match exists, and (3) prioritizing the results of the search operation performed within the CAM array and the results of the comparison performed outside of the CAM array to provide a final search result.
    Type: Application
    Filed: March 16, 2009
    Publication date: September 16, 2010
    Applicant: Integrated Device Technology, Inc.
    Inventor: Kee Park
  • Patent number: 7692941
    Abstract: A CAM system includes an integrated circuit chip having: logic & control circuitry, a CAM cell array, read/write access circuitry that performs read and write accesses to the CAM cell array, comparison access circuitry that performs comparison operations to the CAM cell array, a first voltage supply pad coupled to the read/write access circuitry; and a second voltage supply pad coupled to the comparison access circuitry. A first voltage supply, external to the integrated circuit chip, provides a first supply voltage to the first voltage supply pad, wherein the logic & control circuitry is powered by the first supply voltage. A second voltage supply, external to the integrated circuit chip, provides a second supply voltage to the second voltage supply pad, wherein at least a portion of the comparison access circuitry is powered by the second supply voltage, wherein the second supply voltage is less than the first supply voltage.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: April 6, 2010
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Scott Chu, Kee Park
  • Publication number: 20100046265
    Abstract: A CAM system includes an integrated circuit chip having: logic & control circuitry, a CAM cell array, read/write access circuitry that performs read and write accesses to the CAM cell array, comparison access circuitry that performs comparison operations to the CAM cell array, a first voltage supply pad coupled to the read/write access circuitry; and a second voltage supply pad coupled to the comparison access circuitry. A first voltage supply, external to the integrated circuit chip, provides a first supply voltage to the first voltage supply pad, wherein the logic & control circuitry is powered by the first supply voltage. A second voltage supply, external to the integrated circuit chip, provides a second supply voltage to the second voltage supply pad, wherein at least a portion of the comparison access circuitry is powered by the second supply voltage, wherein the second supply voltage is less than the first supply voltage.
    Type: Application
    Filed: August 25, 2008
    Publication date: February 25, 2010
    Applicant: Integrated Device Technology, Inc.
    Inventors: Scott Chu, Kee Park
  • Patent number: 7669005
    Abstract: Content addressable memory (CAM) devices use both hard and soft priority techniques to allocate entries of different priority therein. The priorities of multiple CAM array blocks within the CAM device may be programmed before or as entries are loaded therein and may be reprogrammed during operation as the allocation of entries within the CAM device changes. The allocation of entries may change in response to additions or deletions of entries or as entries are reprioritized. The CAM devices include preferred priority resolution circuits that can resolve competing soft and hard priorities between multiple hit signals that are generated in response to a search operation. Such hit signals may be active to reflect the presence of at least one matching entry within a CAM array block. The resolution of which active hit signal has the highest overall priority among many can be used to facilitate the identification of the location (e.g.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: February 23, 2010
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Kee Park, Robert J. Proebsting, Scott Yu-Fan Chu, Michael Miller, Mark Baumann
  • Patent number: 7486531
    Abstract: A content addressable memory (CAM) system that includes a row of NAND-type CAM cells divided into a plurality of segments. Each segment includes a plurality of series-connected switching transistors, wherein each of the switching transistors is part of a corresponding NAND-type CAM cell. The series-connected switching transistors of each segment are coupled to the series-connected switching transistors in an adjacent segment by a repeater circuit, thereby forming a chain of series-connected switching transistors and repeater circuits. A match line driver circuit is coupled to one end of the chain, and a match line is connected to the other end of the chain. If a match condition exists for the entire row, then a signal driven by the match line driver is propagated to the match line, through the chain of series-connected switching transistors and repeater circuits.
    Type: Grant
    Filed: August 12, 2005
    Date of Patent: February 3, 2009
    Assignee: Integrated Device Technology, Inc.
    Inventor: Kee Park
  • Patent number: 7471537
    Abstract: A content addressable memory array includes a plurality of rows of active CAM cells electrically coupled to a corresponding plurality of active match lines and at least one row of dummy cells, which are configured to generate an always-match condition on a dummy match line when the CAM array is undergoing a search operation. A match line pull-up circuit is provided. This match line pull-up circuit is electrically coupled to the plurality of active match lines and the dummy match line. The pull-up circuit is responsive to a calibration control signal that sets a pull-up strength of the match line pull-up circuit when the CAM array is undergoing the search operation. A sense amplifier, which is coupled to the match lines, includes a control circuit configured to adjust the calibration control signal in response to evaluating a first voltage on the dummy match line relative to a reference voltage.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: December 30, 2008
    Assignee: Integrated Device Technology, Ltd.
    Inventor: Kee Park
  • Patent number: 7304875
    Abstract: Search engine devices include a content addressable memory (CAM) core having a plurality of CAM array blocks therein and a control circuit. The control circuit, which is electrically coupled to the plurality of CAM array blocks, is configured to perform built-in self repair (BISR) of hard memory defects and/or compare logic defects in the plurality of CAM array blocks concurrently with operations to search entries in the plurality of CAM array blocks.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: December 4, 2007
    Assignee: Integrated Device Technology. Inc.
    Inventors: Chuen Der Lien, Michael Miller, Chau-Chin Wu, Kee Park, Scott Yu-Fan Chu
  • Publication number: 20070275082
    Abstract: Disclosed is a method of preparing sustained release microspheres by spray-drying liquids with different compositions for preparation the sustained release microspheres through an ultrasonic dual-feed nozzle. Unlike conventional methods of preparing sustained release microspheres by spray-drying a single liquid containing a biodegradable polymer, a drug, an additive and a solvent through a single-feed nozzle, the present method is characterized by simultaneously spray-drying two liquids with different compositions for preparation of the sustained release microspheres respectively through internal and external channels of an ultrasonic dual-feed nozzle to coat sprayed droplets through the internal channel with other sprayed droplets through the external channel. The present method is effective in achieving a low initial release and a desired continuous release.
    Type: Application
    Filed: September 3, 2004
    Publication date: November 29, 2007
    Inventors: Hee Lee, Sung Kim, Jung Kim, Young Jung, Jung Kim, Ho Choi, Seung Chang, Kee Park
  • Publication number: 20070135921
    Abstract: A surgical implant for repairing an intervertebral disk. The implant includes an inflatable bladder and an externally threaded inlet port connected to the bladder. The inlet port has a threaded bore through which a filler is admitted into the bladder to inflate it. A setscrew is screwed into the threaded bore for plugging the threaded bore to retain the filler in the bladder.
    Type: Application
    Filed: December 9, 2005
    Publication date: June 14, 2007
    Inventor: Kee Park
  • Publication number: 20070097483
    Abstract: Disclosed is an electrochromic device including at least one display region and at least one non-display region, which are separated from each other, the electrochromic device including a first substrate, a first electrode, an electrochromic layer, an electrolyte layer, optionally an ion storage layer, a second electrode, and a second substrate, which are sequentially formed, wherein the ion storage layer and/or the second electrode are patterned so as to prevent the ion storage layer and/or the second electrode from existing in part or all of said at least one display region; and a display device including the electrochromic device. In the electrochromic device, only the second substrate and electrolyte layer are located between the observer and the electrochromic layer, so that it is possible to prevent a contrast ratio from being degraded due to the ion storage layer and/or second electrode.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 3, 2007
    Inventor: Kee Park
  • Publication number: 20070097482
    Abstract: Disclosed is an electrochromic device, which includes a first electrode formed on a first region of a first substrate, a second electrode formed on a second region of the first substrate, an electrochromic layer formed on the first electrode, an electrolyte layer formed on both of the electrochromic layer and the second electrode, and a second substrate formed on the electrolyte layer; and a display device including the electrochromic device.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 3, 2007
    Inventors: Kee Park, Hyun Shin
  • Publication number: 20070086249
    Abstract: A internal voltage generator in a semiconductor memory device has a first and second internal voltage generators. The first internal voltage generator outputs a first signal having a first voltage level to internal circuits of the memory device during an active mode of the memory device operation. The second internal voltage generator outputs a second signal having a second voltage level to the internal circuits of the memory device; however, the second signal is interrupted in absence of a predetermined level of a power control signal during the active mode of the memory device operation. The internal voltage control unit monitors the operational signals generated by the memory device and outputs the predetermined level of the power control signal during a plurality of active sections of the active mode of the memory device operation requiring power.
    Type: Application
    Filed: October 6, 2006
    Publication date: April 19, 2007
    Inventors: Kang Lee, Kee Park
  • Patent number: 7193876
    Abstract: A CAM array has at least one row therein containing a plurality of memory cells with different susceptibilities to soft errors. The memory cells having reduced susceptibilities to soft errors include those used in check bit cells and/or CAM cells containing valid bit data and/or force no-hit data. Additional memory cells may also be provided with somewhat greater susceptibilities to soft errors and somewhat more aggressive design rules (e.g., smaller layout area). These additional memory cells may include those used in ternary CAM cells (e.g., XY CAM cells) within the row.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: March 20, 2007
    Inventors: Kee Park, Scott Yu-Fan Chu
  • Publication number: 20070059363
    Abstract: Disclosed is a method for preparing a mixed formulation of sustained release microspheres with various compositions by a continuous one-step process. The present method is characterized by preparing the mixed formulation of sustained release microspheres with different compositions by a continuous one-step process by continuously introducing the mixed fluids into a dryer from the two or more different fluids for preparation of sustained release microspheres containing a biodegradable polymer, a drug, an additive and a solvent with different types of contents or both of the components, by controlling the mixing ratios of the fluids according to the time, unlike a conventional method including spray-drying a mixture of microspheres containing a biodegradable polymer, a drug, an additive and a solvent with a single composition.
    Type: Application
    Filed: June 25, 2004
    Publication date: March 15, 2007
    Inventors: Hee Lee, Sung Kim, Jung Kim, Ji Lee, Young Jung, Jun Kim, Yun Seo, Ho-Il Choi, Seung Chang, Kee Park
  • Publication number: 20060247668
    Abstract: A surgical tool including a pair of levers that are pivotally connected together so as to define a pair of opposed rearward portions that serve as handles and a pair of opposed forward portions. A pair of ring curettes is affixed to the forward portions such that, when the rearward portions are squeezed together, the ring curettes are driven apart to cut material from opposite sides of a cavity into which they are inserted.
    Type: Application
    Filed: April 28, 2005
    Publication date: November 2, 2006
    Inventor: Kee Park
  • Patent number: 7110275
    Abstract: A CAM block includes a CAM array having a plurality of rows and columns of 4-bit NAND-type CAM cells therein. Each of a plurality of the NAND-type cells includes a respective ladder-type compare circuit having four two-transistor rungs. At least one of the plurality of rows includes a first 4-bit NAND-type CAM cell having a first ladder-type compare circuit with four two-transistor rungs and a second 4-bit NAND-type CAM cell having a second ladder-type compare circuit with four two-transistor rungs. A match line segment is also provided, which is connected to four source terminals of transistors in the first ladder-type compare circuit and four drain terminals of transistors in the second ladder-type compare circuit.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: September 19, 2006
    Assignee: Integrated Device Technology Inc.
    Inventor: Kee Park