Patents by Inventor Keh-Yung Cheng
Keh-Yung Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170207085Abstract: A horizontal semiconductor device includes an electrically conductive substrate having a first surface, a buffer layer disposed on the first surface of the substrate, an epitaxial unit disposed on the buffer layer opposite to the substrate, a first electrode unit disposed on the epitaxial unit, and a second electrode unit. The substrate has an exposed region that is exposed from the buffer layer and the epitaxial unit. The second electrode unit includes a first conductive member disposed on the epitaxial unit and spaced apart from the first electrode unit, and a second conductive member extending from the first conductive member to the exposed region.Type: ApplicationFiled: June 21, 2016Publication date: July 20, 2017Applicant: National Tsing Hua UniversityInventors: Chih-Fang HUANG, Keh-Yung CHENG, Wei-Chen YANG, Ting-Fu CHANG, Po-Ju CHU, Jian-Lin LIN, Ya-Chu LIAO, Hsin-Ying TSENG
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Patent number: 9502602Abstract: A structure of high electron mobility light emitting transistor comprises a substrate, a HEMT region disposed on the substrate, and a gallium nitride LED (GaN-LED) region disposed on the substrate. A two-dimensional electron gas layer is present in each of the HEMI region and the LED region, and the HEMT region is coupled to the LED region through the two-dimensional electron gas layer.Type: GrantFiled: December 31, 2014Date of Patent: November 22, 2016Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Chih-Fang Huang, Yi-Chen Li, Ting-Fu Chang, Keh-Yung Cheng, Yu-Li Wang, Chun-Hung Wu, Wei-Chen Yang, Shao-Yen Chiu
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Publication number: 20160190384Abstract: A structure of high electron mobility light emitting transistor comprises a substrate, a HEMT region disposed on the substrate, and a gallium nitride LED (GaN-LED) region disposed on the substrate. A two-dimensional electron gas layer is present in each of the HEMI region and the LED region, and the HEMT region is coupled to the LED region through the two-dimensional electron gas layer.Type: ApplicationFiled: December 31, 2014Publication date: June 30, 2016Inventors: Chih-Fang HUANG, Yi-Chen LI, Ting-Fu CHANG, Keh-Yung CHENG, Yu-Li WANG, Chun-Hung WU, Wei-Chen YANG, Shao-Yen CHIU
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Publication number: 20160190259Abstract: The invention provides an epitaxial growth structure and a growth method thereof. The epitaxial growth structure comprises a substrate, a plurality of seeds, a plurality of nanorods and a film. The seeds arranged in an array are disposed on a surface of the substrate. The nanorods are disposed longitudinally on the seeds, respectively. The film covers horizontally on upper surfaces of the nanorods to form a substantial plane.Type: ApplicationFiled: December 30, 2014Publication date: June 30, 2016Inventors: Keh-Yung CHENG, Yu-Li WANG, Chun-Hung WU, Pin-Yi LEE, Shao-Yen CHIU
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Patent number: 9276380Abstract: A device for controlling light emissions and a method for fabricating the device are disclosed herein. A quantum well of an active region of a semiconductor device may comprise a quantum structure lattice having lattice geometries that satisfies the Bragg condition, such that inter-quantum structure distance d between a first quantum structure and a second quantum structure within the quantum structure lattice is an integer multiple of a emission half wavelength m?o/2n, where m is an integer, ?o is a wavelength in free space, and n is a refractive index of a cladding material of the quantum well.Type: GrantFiled: September 30, 2012Date of Patent: March 1, 2016Inventors: Keh-Yung Cheng, Chien-Chia Cheng, Kuang-Chien Hsieh
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Patent number: 9218965Abstract: By using a nano-scale patterning process, a dislocation defect density of a GaN epitaxy layer can be further reduced. This is because the nano-scale epitaxy structure dimension is advantageous to the reduction of the strain energy accumulated by mismatched lattices, thereby decreasing the possibility of generating defects. It is verified that the nano-scale patterning process can effectively decrease the dislocation defect density of the GaN epitaxial layer on a sapphire substrate. Considering uniformity and reproducibility on the application of the large-size wafer, the invention has utilized the soft mask NIL patterning technology to successfully implement the uniform deposition and position control of the InAs quantum dot on a GaAs substrate. This further utilizes the NIL technology in conjunction with dry-etching to perform the nano-scale patterning on a heterogeneous substrate, such as Si, sapphire or the like.Type: GrantFiled: March 28, 2014Date of Patent: December 22, 2015Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Keh-Yung Cheng, Yu-Li Wang, Wei-Chen Yang, Shao-Yen Chiu
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Publication number: 20150279656Abstract: By using a nano-scale patterning process, a dislocation defect density of a GaN epitaxy layer can be further reduced. This is because the nano-scale epitaxy structure dimension is advantageous to the reduction of the strain energy accumulated by mismatched lattices, thereby decreasing the possibility of generating defects. It is verified that the nano-scale patterning process can effectively decrease the dislocation defect density of the GaN epitaxial layer on a sapphire substrate. Considering uniformity and reproducibility on the application of the large-size wafer, the invention has utilized the soft mask NIL patterning technology to successfully implement the uniform deposition and position control of the InAs quantum dot on a GaAs substrate. This further utilizes the NIL technology in conjunction with dry-etching to perform the nano-scale patterning on a heterogeneous substrate, such as Si, sapphire or the like.Type: ApplicationFiled: March 28, 2014Publication date: October 1, 2015Applicant: National Tsing Hua UniversityInventors: Keh-Yung CHENG, Yu-Li WANG, Wei-Chen YANG, Shao-Yen CHIU
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Publication number: 20130230069Abstract: A device for controlling light emissions and a method for fabricating the device are disclosed herein. A quantum well of an active region of a semiconductor device may comprise a quantum structure lattice having lattice geometries that satisfies the Bragg condition, such that inter-quantum structure distance d between a first quantum structure and a second quantum structure within the quantum structure lattice is an integer multiple of a emission half wavelength m?o/2n, where m is an integer, ?o is a wavelength in free space, and n is a refractive index of a cladding material of the quantum well.Type: ApplicationFiled: September 30, 2012Publication date: September 5, 2013Inventors: Keh-Yung Cheng, Chien-Chia Cheng, Kuang-Chien Hsieh
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Publication number: 20080296619Abstract: Amorphous and polycrystalline III-V semiconductor including (Ga,As), (Al,As), (In,As), (Ga,N), and (Ga,P) materials were grown at low temperatures on semiconductor substrates. After growth, different substrates containing the low temperature grown material were pressed together in a pressure jig before being annealed. The annealing temperatures ranged from about 300° C. to 800° C. for annealing times between 30 minutes and 10 hours, depending on the bonding materials. The structures remained pressed together throughout the course of the annealing. Strong bonds were obtained for bonding layers between different substrates that were as thin as 3 nm and as thick as 600 nm. The bonds were ohmic with a relatively small resistance, optically transparent, and independent of the orientation of the underlying structures.Type: ApplicationFiled: June 12, 2008Publication date: December 4, 2008Applicant: Board of Trustees of the University of IllinoisInventors: Kuang Chien Hsieh, Keh-Yung Cheng, Kuo-Lih Chang, John H. Epple, Gregory Pickrell
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Publication number: 20080217652Abstract: This invention provides high quality and low defect density Sb-containing alloys on lattice-mismatched substrates using Sb-containing buffer layers. More specifically, provided is a method of forming an epitaxial semiconductor alloy on a substrate, comprising: providing a substrate (such as InP); growing an Sb-containing buffer layer on the substrate; and growing a layer of As/Sb-containing semiconductor alloy on the buffer layer.Type: ApplicationFiled: October 23, 2007Publication date: September 11, 2008Inventors: Keh-Yung Cheng, Bing-Ruey Wu
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Patent number: 7407863Abstract: Amorphous and polycrystalline III-V semiconductor including (Ga,As), (Al,As), (In,As), (Ga,N), and (Ga,P) materials were grown at low temperatures on semiconductor substrates. After growth, different substrates containing the low temperature grown material were pressed together in a pressure jig before being annealed. The annealing temperatures ranged from about 300° C. to 800° C. for annealing times between 30 minutes and 10 hours, depending on the bonding materials. The structures remained pressed together throughout the course of the annealing. Strong bonds were obtained for bonding layers between different substrates that were as thin as 3 nm and as thick as 600 nm. The bonds were ohmic with a relatively small resistance, optically transparent, and independent of the orientation of the underlying structures.Type: GrantFiled: October 7, 2003Date of Patent: August 5, 2008Assignee: Board of Trustees of the University of IllinoisInventors: Kuang Chien Hsieh, Keh-Yung Cheng, Kuo-Lih Chang, John H. Epple, Gregory Pickrell
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Patent number: 7027225Abstract: Distributed Bragg reflectors may be formed in fewer layers by the method, which is capable of producing greater differences in indexes of refraction. Group III–V alternating layers are deposited. The microstructure of alternating layers is controlled to be different. A combination of alternating polycrystalline layers or amorphous and polycrystalline layers results. Alternate ones of the layers oxidize more quickly than the others. A lateral wet oxidation of the alternate ones of the layers produces a structure with large differences in indexes of refraction between adjacent layers. The microstructure between alternating layers may be controlled by controlling Group V overpressure alone or in combination with growth temperature.Type: GrantFiled: June 16, 2003Date of Patent: April 11, 2006Assignee: The Board of Trustees of the University of IllinoisInventors: Kuang-Chien Hsieh, Keh-Yung Cheng
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Publication number: 20050074927Abstract: Amorphous and polycrystalline III-V semiconductor including (Ga,As), (Al,As), (In,As), (Ga,N), and (Ga,P) materials were grown at low temperatures on semiconductor substrates. After growth, different substrates containing the low temperature grown material were pressed together in a pressure jig before being annealed. The annealing temperatures ranged from about 300° C. to 800° C. for annealing times between 30 minutes and 10 hours, depending on the bonding materials. The structures remained pressed together throughout the course of the annealing. Strong bonds were obtained for bonding layers between different substrates that were as thin as 3 nm and as thick as 600 nm. The bonds were ohmic with a relatively small resistance, optically transparent, and independent of the orientation of the underlying structures.Type: ApplicationFiled: October 7, 2003Publication date: April 7, 2005Inventors: Kuang Hsieh, Keh-Yung Cheng, Kuo-Lih Chang, John Epple, Gregory Pickrell
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Publication number: 20040096574Abstract: Distributed Bragg reflectors may be formed in fewer layers by the method, which is capable of producing greater differences in indexes of refraction. Group III-V alternating layers are deposited. The microstructure of alternating layers is controlled to be different. A combination of alternating polycrystalline layers or amorphous and polycrystalline layers results. Alternate ones of the layers oxidize more quickly than the others. A lateral wet oxidation of the alternate ones of the layers produces a structure with large differences in indexes of refraction between adjacent layers. The microstructure between alternating layers may be controlled by controlling Group V overpressure alone or in combination with growth temperature.Type: ApplicationFiled: June 16, 2003Publication date: May 20, 2004Applicant: The Board of Trustees of the University of Illinois.Inventors: Kuang-Chien Hsieh, Keh-Yung Cheng
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Patent number: 6599564Abstract: Distributed Bragg reflectors may be formed in fewer layers by the method, which is capable of producing greater differences in indexes of refraction. Group III-V alternating layers are deposited. The microstructure of alternating layers is controlled to be different. A combination of alternating polycrystalline layers or amorphous and polycrystalline layers results. Alternate ones of the layers oxidize more quickly than the others. A lateral wet oxidation of the alternate ones of the layers produces a structure with large differences in indexes of refraction between adjacent layers. The microstructure between alternating layers may be controlled by controlling Group V overpressure alone or in combination with growth temperature.Type: GrantFiled: August 9, 2000Date of Patent: July 29, 2003Assignee: The Board of Trustees of the University of IllinoisInventors: Kuang-Chien Hsieh, Keh-Yung Cheng
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Patent number: 5727012Abstract: The specification describes a heterostructure laser utilizing GaAs based materials that emits at 0.98 .mu.m and is thus suitable for pumping an erbium doped fiber waveguide amplifier. The composition of the cladding layers of the laser is designed to give exceptional electrical and optical confinement without the high levels of aluminum that are found to reduce the lifetime of high performing prior art devices.Type: GrantFiled: March 7, 1996Date of Patent: March 10, 1998Assignee: Lucent Technologies Inc.Inventors: James Nelson Baillargeon, Keh-Yung Cheng, Alfred Yi Cho