Patents by Inventor Kehan Zhang

Kehan Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240067957
    Abstract: Genetic circuits that control transgene expression in response to pre-defined transcriptional cues would enable the development of smart therapeutics. The present disclosure relates to engineered programmable single-transcript RNA sensors in which adenosine deaminases acting on RNA (ADARs) autocatalytically convert trigger hybridization into a translational output. This system amplifies the signal from editing by endogenous ADAR through a positive feedback loop. Amplification is mediated by the expression of a hyperactive, minimal ADAR variant and its recruitment to the edit site via an orthogonal RNA targeting mechanism. This topology confers high dynamic range, low background, minimal off-target effects, and a small genetic footprint. The circuits and systems disclosed herein leverage an ability to detect single nucleotide polymorphisms and modulate translation in response to endogenous transcript levels in mammalian cells.
    Type: Application
    Filed: June 22, 2023
    Publication date: February 29, 2024
    Applicants: Massachusetts Institute of Technology, President and Fellows of Harvard College
    Inventors: James J. Collins, Raphael Gayet, Katherine IIia, Shiva Razavi, Nathaniel Tippens, Kehan Zhang, Jack Chen, Jonathan Chen, Makoto Lalwani
  • Publication number: 20230317823
    Abstract: A semiconductor structure includes a first sidewall spacer on sidewalls of a first device structure on a surface of a substrate and a second sidewall spacer on sidewalls of a second device structure on the surface of the substrate. The first sidewall spacer includes a first liner layer on sidewalls of the first device structure, a first oxide spacer on the first liner layer and on the surface of the substrate, and a first etch stop layer on the first oxide spacer. The second sidewall spacer includes a second liner layer on sidewalls of the second device structure, an inner oxide spacer on the second liner layer and on the surface of the substrate, a second etch stop layer on the inner oxide layer, and an outer oxide spacer on the second etch stop layer.
    Type: Application
    Filed: April 1, 2022
    Publication date: October 5, 2023
    Applicant: Micron Technology, Inc.
    Inventors: Kehan Zhang, Yoshikazu Moriwaki