Abstract: A solid electrolytic capacitor includes a capacitor element. The capacitor element includes an anode foil including a base material part and a porous part disposed on a surface of the base material part, a dielectric layer disposed on at least a part of a surface of the anode foil, a solid electrolyte layer covering at least a part of the dielectric layer, and a cathode lead-out layer covering at least a part of the solid electrolyte layer. The anode foil includes an anode section on which the solid electrolyte layer is not disposed, a cathode formation section on which the solid electrolyte layer is disposed, and a separation section located between the anode section and the cathode formation section. A first insulating material is disposed on a surface of the porous part in the separation section. And at least a part of a region of the porous part that is covered with the first insulating material includes a second insulating material.

Abstract: A circuit board includes: an insulating layer; a capacitor which is provided in the insulating layer and which includes a dielectric layer, a first conductor layer provided on a first surface of the dielectric layer and including an opening part, and a second conductor layer provided on a second surface opposite to the first surface of the dielectric layer and including a recess part at a position corresponding to the opening part; and a conductor via provided in the insulating layer, penetrating the dielectric layer, the opening part and the recess part, being in contact with the recess part, and being smaller than the opening part in plan view.

Abstract: A board includes a plate-shaped member having a first wiring pattern, a first resin layer formed on a first surface of the plate-shaped member, the first surface having the first wiring pattern, a second resin layer stacked on the first resin layer, and a component fixed to the second resin layer in which a second wiring pattern formed on a second surface of the component is buried.

Abstract: A circuit board includes: an insulating layer; a capacitor which is provided in the insulating layer and which includes a dielectric layer, a first conductor layer provided on a first surface of the dielectric layer and including an opening part, and a second conductor layer provided on a second surface opposite to the first surface of the dielectric layer and including a recess part at a position corresponding to the opening part; and a conductor via provided in the insulating layer, penetrating the dielectric layer, the opening part and the recess part, being in contact with the recess part, and being smaller than the opening part in plan view.

Abstract: A board includes a plate-shaped member having a first wiring pattern, a first resin layer formed on a first surface of the plate-shaped member, the first surface having the first wiring pattern, a second resin layer stacked on the first resin layer, and a component fixed to the second resin layer in which a second wiring pattern formed on a second surface of the component is buried.

Abstract: A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.

Abstract: A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.

Abstract: A component-mounted board includes: a substrate; an electronic component disposed over the substrate; and a conductive via formed in the substrate to be in contact with a bottom surface and a side surface of an electrode of the electronic component in a state where the electronic component is disposed over the substrate.

Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.

Abstract: A method for manufacturing a component built-in substrate is disclosed, which can attain high densities of components and wirings. The method includes: mounting electronic components on a predetermined member with its surface being provided with a first layer enabled to be exfoliated; stacking a second layer to fill the electronic components further on the first layer; exfoliating and removing the predetermined member from a stacked body configured by stacking the second layer on the first layer; and forming a via to penetrate the first layer and conduct to the electronic components from a surface of the surfaces of the stacked body, from which the predetermined member is removed.

Abstract: A method for manufacturing a component built-in substrate is disclosed, which can attain high densities of components and wirings. The method includes: mounting electronic components on a predetermined member with its surface being provided with a first layer enabled to be exfoliated; stacking a second layer to fill the electronic components further on the first layer; exfoliating and removing the predetermined member from a stacked body configured by stacking the second layer on the first layer; and forming a via to penetrate the first layer and conduct to the electronic components from a surface of the surfaces of the stacked body, from which the predetermined member is removed.

Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.

Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.

Abstract: A semiconductor chip mounting layer of a package substrate unit includes an insulation layer, a conductive seed metal layer formed on the top surface of the insulation layer, conductive pads formed on the top surface of the conductive seed metal layer, metal posts formed substantially in the central portion on the top surface of the conductive pads, and a solder resist layer that is formed to surround the conductive pads and the metal posts.

Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.

Abstract: A semiconductor chip mounting layer of a package substrate unit includes an insulation layer, a conductive seed metal layer formed on the top surface of the insulation layer, conductive pads formed on the top surface of the conductive seed metal layer, metal posts formed substantially in the central portion on the top surface of the conductive pads, and a solder resist layer that is formed to surround the conductive pads and the metal posts.