Patents by Inventor Kei Goto
Kei Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240131724Abstract: A robot capable of performing precise work is provided. The robot includes an actuator unit and an end effector provided at a tip of the actuator unit. The end effector includes a first sensor capable of detecting a pressure distribution in a contact region coming into contact with a workpiece, and a second sensor capable of detecting position information of the contact region.Type: ApplicationFiled: February 28, 2022Publication date: April 25, 2024Inventors: KEI TSUKAMOTO, SATOKO NAGAKARI, YOSHIAKI SAKAKURA, KEN KOBAYASHI, TETSURO GOTO
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Patent number: 11966550Abstract: A sensor module includes a sensor that includes a first sensor layer of a capacitance type including a plurality of first detection units arranged two-dimensionally and a second sensor layer of a capacitance type including a plurality of second detection units arranged two-dimensionally, the first sensor layer being provided on the second sensor layer, and a control unit that scans the plurality of first detection units and the plurality of second detection units.Type: GrantFiled: January 29, 2021Date of Patent: April 23, 2024Assignee: Sony Group CorporationInventors: Tetsuro Goto, Ken Kobayashi, Kei Tsukamoto, Tomoko Katsuhara
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Patent number: 10103036Abstract: A packing method for a semiconductor device includes a step of preparing the semiconductor device that has a sealing body having a principal surface and a plurality of leads, and a step of preparing a base carrier tape that has a peripheral portion, a step portion, and a pocket portion. The method further includes a step of placing the semiconductor device in the pocket portion, a step of bonding a cover tape to the step portion in such a manner that the sealing body is pressed against the base carrier tape, and a step of winding the base carrier tape with the semiconductor device placed therein and with the cover tape bonded thereto, around a tape reel. The base carrier tape includes a principal surface of the peripheral portion, a principal surface of the step portion, and a principal surface of the pocket portion.Type: GrantFiled: April 18, 2017Date of Patent: October 16, 2018Assignee: Renesas Electronics CorporationInventors: Hiroaki Tanoue, Kei Goto
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Publication number: 20180005845Abstract: A packing method for a semiconductor device includes a step of preparing the semiconductor device that has a sealing body having a principal surface and a plurality of leads, and a step of preparing a base carrier tape that has a peripheral portion, a step portion, and a pocket portion. The method further includes a step of placing the semiconductor device in the pocket portion, a step of bonding a cover tape to the step portion in such a manner that the sealing body is pressed against the base carrier tape, and a step of winding the base carrier tape with the semiconductor device placed therein and with the cover tape bonded thereto, around a tape reel. The base carrier tape includes a principal surface of the peripheral portion, a principal surface of the step portion, and a principal surface of the pocket portion.Type: ApplicationFiled: April 18, 2017Publication date: January 4, 2018Inventors: Hiroaki TANOUE, Kei GOTO
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Patent number: 9272746Abstract: A vehicle body frame manufactured by welding is configured for weight reduction, and includes first and second frame members. The first frame member has a predetermined thickness including a first flat surface portion wider than the predetermined thickness. The second frame member includes a second flat surface portion touching the first flat surface portion. The first and second frame members are joined by bringing the flat surface portions together and welding the first and second flat surface portions together with laser beams parallel to the first flat surface portion. In this way, the laser welding can be performed with a reduced gap between the two members. Welding using laser beams applied from directions parallel to the flat surfaces allows the weld area to be significantly larger than conventional fillet welding.Type: GrantFiled: March 25, 2015Date of Patent: March 1, 2016Assignee: Honda Motor Co., Ltd.Inventors: Yusuke Inoue, Tomoya Matsuo, Kei Goto
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Publication number: 20150274238Abstract: A vehicle body frame manufactured by welding is configured for weight reduction, and includes first and second frame members. The first frame member has a predetermined thickness including a first flat surface portion wider than the predetermined thickness. The second frame member includes a second flat surface portion touching the first flat surface portion. The first and second frame members are joined by bringing the flat surface portions together and welding the first and second flat surface portions together with laser beams parallel to the first flat surface portion. In this way, the laser welding can be performed with a reduced gap between the two members. Welding using laser beams applied from directions parallel to the flat surfaces allows the weld area to be significantly larger than conventional fillet welding.Type: ApplicationFiled: March 25, 2015Publication date: October 1, 2015Inventors: Yusuke INOUE, Tomoya MATSUO, Kei GOTO
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Patent number: 5786627Abstract: An integrated circuit device includes a substrate, circuit elements on the substrate, and an electrically conductive thermoplastic resin substance electrically connecting the circuit elements on the substrate. Therefore, since variations in the configuration of the thermoplastic resin are quite small relative to those of interconnecting wires, variation in parasitic inductance due to variation in the configuration of the connections is reduced and the uniformity and the reproducibility of the high frequency characteristics of the integrated circuit device are enhanced. A method for fabricating an integrated circuit device includes forming circuit elements on a substrate and forming an electrically conducting thermoplastic resin substance electrically connecting the circuit elements.Type: GrantFiled: October 22, 1997Date of Patent: July 28, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Akira Inoue, Kei Goto, Yoshihiro Notani, Yasuharu Nakajima, Hiroto Matsubayashi, Yukio Ohta
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Patent number: 5767569Abstract: The method for mounting a semiconductor chip comprises disposing conductive thermoplastic polyimide as a bonding material between an inner lead of the TAB tape and an external connecting electrode of the semiconductor chip, applying pressure to the conductive thermoplastic polyimide by a wedge with heating by a hot stage via the semiconductor chip. The semiconductor chip comprises the external connecting electrode adhered the conductive thermoplastic polyimide. The method for fabricating the semiconductor chip comprises forming a signal line and a protective film, forming an electrode pad on the signal line not provided the protective film, forming a conductive thermoplastic polyimide layer on the semiconductor wafer by spin coating, forming a resist on the conductive thermoplastic polyimide layer and performing an etching with using the resist as a mask. The inner lead of the TAB tape is made of conductive thermoplastic polyimide, not gilded.Type: GrantFiled: January 11, 1996Date of Patent: June 16, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yukio Ohta, Kei Goto, Yoshihiro Notani, Yasuharu Nakajima, Akira Inoue, Hiroto Matubayashi
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Patent number: 5675184Abstract: An integrated circuit device includes a substrate; circuit elements including an active element and a bias line for applying a DC bias voltage to the active element, disposed on the substrate; a thermoplastic material layer disposed on a region of the substrate; and a magnetic substance layer disposed on a region of the substrate including a region of the bias line, and adhered to and supported by the thermoplastic material layer. In this structure, the magnetic substance layer can be formed in an appropriate shape and at an appropriate position on the bias line according to the oscillation characteristics of the active element, such as a transistor, and the magnetic substance layer absorbs the frequency components of the oscillation of the active element, whereby oscillation of the active element is easily prevented.Type: GrantFiled: January 17, 1996Date of Patent: October 7, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiroto Matsubayashi, Kei Goto, Yoshihiro Notani, Yukio Ohta, Akira Inoue, Yasuharu Nakajima
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Patent number: 5528074Abstract: A semiconductor device includes a substrate having a microwave semiconductor element, a microwave transmission line disposed on the substrate and electrically connected to the microwave semiconductor element, and a waveguide terminal structure disposed in the substrate and connected to an end of an external waveguide, wherein an end of a signal conductor of the microwave transmission line is included in the waveguide terminal structure. Input and output of microwave signals between the semiconductor device and an external device are carried out simply by applying an end of the external waveguide to the waveguide terminal structure. As a result, even when the substrate of the semiconductor device warps, an input-output characteristic evaluation of the semiconductor device is carried out with high stability.Type: GrantFiled: January 26, 1995Date of Patent: June 18, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kei Goto, Takayuki Katoh