Patents by Inventor Kei Imafuji
Kei Imafuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11605585Abstract: A flexible substrate includes a first area including a first circuit, the first circuit configured to be connectable to a first component, a second area including a second circuit, the second circuit configured to be connectable to a second component, a connecting area provided between the first area and the second area and including a third circuit, the third circuit connecting the first circuit and the second circuit, one or more first via conductors provided between the first area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit, and one or more second via conductors provided between the second area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit.Type: GrantFiled: October 12, 2021Date of Patent: March 14, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kei Imafuji
-
Publication number: 20220157697Abstract: A wiring substrate includes a bendable portion including one or more wiring layers and insulation layers that are alternately stacked. The insulation layers of the bendable portion include a first insulation layer and a second insulation layer. The first insulation layer is located at an inner bent position of the bendable portion when the bendable portion is bent. The second insulation layer is located at an outer bent position of the bendable portion relative to the first insulation layer when the bendable portion is bent. The first insulation layer has a higher elastic modulus than the second insulation layer.Type: ApplicationFiled: November 15, 2021Publication date: May 19, 2022Inventors: Hiroshi TANEDA, Kei IMAFUJI, Yoshiki AKIYAMA, Kensuke UCHIDA
-
Publication number: 20220130739Abstract: A flexible substrate includes a first area including a first circuit, the first circuit configured to be connectable to a first component, a second area including a second circuit, the second circuit configured to be connectable to a second component, a connecting area provided between the first area and the second area and including a third circuit, the third circuit connecting the first circuit and the second circuit, one or more first via conductors provided between the first area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit, and one or more second via conductors provided between the second area and the connecting area and electrically isolated from the first circuit, the second circuit, and the third circuit.Type: ApplicationFiled: October 12, 2021Publication date: April 28, 2022Inventor: Kei IMAFUJI
-
Patent number: 10438883Abstract: A wiring board includes an insulator layer having a top surface, and a plurality of pads arranged in a pad arrangement region on the top surface of the insulator layer. The pad arrangement region includes a first region in which a first plurality of pads among the plurality of pads are arranged at a first density, and a second region in which a second plurality of pads among the plurality of pads are arranged at a second density lower than the first density. At least one dummy pad is arranged juxtaposed to at least one of the second plurality of pads in the second region of the pad arrangement region.Type: GrantFiled: November 21, 2017Date of Patent: October 8, 2019Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kei Imafuji
-
Publication number: 20180182701Abstract: A wiring board includes an insulator layer having a top surface, and a plurality of pads arranged in a pad arrangement region on the top surface of the insulator layer. The pad arrangement region includes a first region in which a first plurality of pads among the plurality of pads are arranged at a first density, and a second region in which a second plurality of pads among the plurality of pads are arranged at a second density lower than the first density. At least one dummy pad is arranged juxtaposed to at least one of the second plurality of pads in the second region of the pad arrangement region.Type: ApplicationFiled: November 21, 2017Publication date: June 28, 2018Inventor: Kei Imafuji
-
Publication number: 20180096926Abstract: An interconnection substrate includes a first insulating layer, and an interconnection structure formed on the first insulating layer, wherein the interconnection structure includes an interconnection pattern having a first metal layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer, and a fourth metal layer covering an upper surface and side surface of the interconnection pattern, wherein an outer perimeter of the second metal layer protrudes at the side surface of the interconnection pattern to form a first protrusion, and the fourth metal layer has a second protrusion that protrudes at a side surface of the interconnection structure at a position corresponding to the first protrusion.Type: ApplicationFiled: September 28, 2017Publication date: April 5, 2018Inventors: Kei IMAFUJI, Satoshi FUJII
-
Patent number: 9935043Abstract: An interconnection substrate includes a first insulating layer, and an interconnection structure formed on the first insulating layer, wherein the interconnection structure includes an interconnection pattern having a first metal layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer, and a fourth metal layer covering an upper surface and side surface of the interconnection pattern, wherein an outer perimeter of the second metal layer protrudes at the side surface of the interconnection pattern to form a first protrusion, and the fourth metal layer has a second protrusion that protrudes at a side surface of the interconnection structure at a position corresponding to the first protrusion.Type: GrantFiled: September 28, 2017Date of Patent: April 3, 2018Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Imafuji, Satoshi Fujii
-
Patent number: 9899304Abstract: A wiring substrate includes a first wiring layer that is an uppermost wiring layer, a protective insulation layer that covers the first wiring layer, and a first through hole that extends through the protective insulation layer in a thickness-wise direction to partially expose an upper surface of the first wiring layer. The first through hole includes a recess defined in an upper surface of the protective insulation layer by a curved wall surface and an opening that extends from the upper surface of the first wiring layer to a bottom of the recess and is in communication with the recess. The opening is smaller than the recess in a plan view.Type: GrantFiled: December 16, 2016Date of Patent: February 20, 2018Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kei Imafuji, Keiji Yoshizawa, Hirokazu Yoshino, Kenta Uchiyama
-
Publication number: 20170186677Abstract: A wiring substrate includes a first wiring layer that is an uppermost wiring layer, a protective insulation layer that covers the first wiring layer, and a first through hole that extends through the protective insulation layer in a thickness-wise direction to partially expose an upper surface of the first wiring layer. The first through hole includes a recess defined in an upper surface of the protective insulation layer by a curved wall surface and an opening that extends from the upper surface of the first wiring layer to a bottom of the recess and is in communication with the recess. The opening is smaller than the recess in a plan view.Type: ApplicationFiled: December 16, 2016Publication date: June 29, 2017Inventors: KEI IMAFUJI, KEIJI YOSHIZAWA, HIROKAZU YOSHINO, KENTA UCHIYAMA
-
Patent number: 9545016Abstract: A wiring substrate includes an insulating layer, and a connection terminal formed on the insulating layer. The connection terminal includes a metal layer formed on the insulating layer and including an upper surface, a metal post formed on the upper surface of the metal layer and including upper and side surfaces, and a surface plating layer that covers the upper and side surfaces of the metal post. The metal layer includes a material that is inactive with respect to a material included in the surface plating layer. The metal layer has an upper surface edge part that is exposed at an outside from the side surface of the metal post in a plan view. The surface plating layer is formed to expose the upper surface edge part of the metal layer.Type: GrantFiled: April 1, 2015Date of Patent: January 10, 2017Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Imafuji, Noriyoshi Shimizu, Kiyoshi Ol, Hiromu Arisaka
-
Patent number: 9485864Abstract: A bump structure provided on an electrode pad includes a solder member, and a metal layer having a cylindrical portion covering a side surface of the solder member, the metal layer being made of a metal which is higher in melting point than the solder member. An upper part of the cylindrical portion of the metal layer is opened wide.Type: GrantFiled: July 11, 2014Date of Patent: November 1, 2016Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Imafuji, Katsumi Yamazaki, Noritaka Katagiri, Teruaki Chino
-
Patent number: 9210807Abstract: A wiring substrate includes: a connection pad having a first surface; a protective insulation layer formed on the first surface of the connection pad and having an opening portion therein, wherein a portion of the first surface of the connection pad is exposed from the opening portion; a metal layer having a lower surface facing the first surface of the connection pad and an upper surface opposite to the lower surface and formed on the first surface of the connection pad which is exposed from the opening portion, the metal layer including a raised portion that extends upward from the upper surface of the metal layer in a peripheral portion thereof; and a bump electrode formed on the upper surface of the metal layer.Type: GrantFiled: November 19, 2013Date of Patent: December 8, 2015Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Imafuji, Jun Yoshiike
-
Publication number: 20150305153Abstract: A wiring substrate includes an insulating layer, and a connection terminal formed on the insulating layer. The connection terminal includes a metal layer formed on the insulating layer and including an upper surface, a metal post formed on the upper surface of the metal layer and including upper and side surfaces, and a surface plating layer that covers the upper and side surfaces of the metal post. The metal layer includes a material that is inactive with respect to a material included in the surface plating layer. The metal layer has an upper surface edge part that is exposed at an outside from the side surface of the metal post in a plan view. The surface plating layer is formed to expose the upper surface edge part of the metal layer.Type: ApplicationFiled: April 1, 2015Publication date: October 22, 2015Inventors: Kei IMAFUJI, Noriyoshi SHIMIZU, Kiyoshi OI, Hiromu ARISAKA
-
Patent number: 9084339Abstract: A wiring substrate includes: a wiring substrate body including a first surface and a second surface; a first electrode pad including a first recess therein and formed on the first surface of the wiring substrate body; a second electrode pad including a second recess therein and formed on the first surface of the wiring substrate body; a first solder resist layer on the first surface of the wiring substrate body to cover the first and second electrode pads, the first solder resist layer including a first opening and a second opening whose opening area is larger than that of the first opening; and a first metal layer electrically connected to the first electrode pad and made of a material whose ionization tendency is smaller than that of a material of the first electrode pad. A depth of the first recess is larger than that of the second recess.Type: GrantFiled: April 16, 2013Date of Patent: July 14, 2015Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kei Imafuji
-
Publication number: 20150029689Abstract: A bump structure provided on an electrode pad includes a solder member, and a metal layer having a cylindrical portion covering a side surface of the solder member, the metal layer being made of a metal which is higher in melting point than the solder member. An upper part of the cylindrical portion of the metal layer is opened wide.Type: ApplicationFiled: July 11, 2014Publication date: January 29, 2015Inventors: Kei IMAFUJI, Katsumi YAMAZAKI, Noritaka KATAGIRI, Teruaki CHINO
-
Publication number: 20140138134Abstract: A wiring substrate includes: a connection pad having a first surface; a protective insulation layer formed on the first surface of the connection pad and having an opening portion therein, wherein a portion of the first surface of the connection pad is exposed from the opening portion; a metal layer having a lower surface facing the first surface of the connection pad and an upper surface opposite to the lower surface and formed on the first surface of the connection pad which is exposed from the opening portion, the metal layer including a raised portion that extends upward from the upper surface of the metal layer in a peripheral portion thereof; and a bump electrode formed on the upper surface of the metal layer.Type: ApplicationFiled: November 19, 2013Publication date: May 22, 2014Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Imafuji, Jun Yoshiike
-
Publication number: 20130284499Abstract: A wiring substrate includes: a wiring substrate body including a first surface and a second surface; a first electrode pad including a first recess therein and foamed on the first surface of the wiring substrate body; a second electrode pad including a second recess therein and formed on the first surface of the wiring substrate body; a first solder resist layer on the first surface of the wiring substrate body to cover the first and second electrode pads, the first solder resist layer including a first opening and a second opening whose opening area is larger than that of the first opening; and a first metal layer electrically connected to the first electrode pad and made of a material whose ionization tendency is smaller than that of a material of the first electrode pad. A depth of the first recess is larger than that of the second recess.Type: ApplicationFiled: April 16, 2013Publication date: October 31, 2013Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Kei IMAFUJI
-
Patent number: 7901997Abstract: A solder 14 is formed, by a plating method, on a connecting surface 21A and a side surface 21B in a connecting pad 21 of a wiring board 11 which is opposed to a metal bump 13 formed on an electrode pad 31 of a semiconductor chip 12, and subsequently, the solder 14 is molten to form an accumulated solder 15 taking a convex shape on the connecting surface 21A of the connecting pad 21 and the metal bump 13 is then mounted on the connecting surface 21A of the connecting pad 21 on which the accumulated solder is formed, and the accumulated solder 15 and the metal bump 13 are thus bonded to each other.Type: GrantFiled: January 29, 2008Date of Patent: March 8, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventors: Takashi Ozawa, Seiji Sato, Masao Nakazawa, Mitsuyoshi Imai, Masatoshi Nakamura, Kei Imafuji
-
Patent number: 7807560Abstract: A solder bump forming method of carrying out a reflow treatment over a conductive ball mounted on a plurality of pads, thereby forming a solder bump, includes a metal film forming step of forming a metal film capable of chemically reacting to a tackifying compound on the pads, an organic sticking layer forming step of causing a solution containing the tackifying compound to chemically react to the metal film, thereby forming an organic sticking layer on the metal film, and a conductive ball mounting step of supplying the conductive ball on the pads having the organic sticking layer formed thereon, thereby mounting the conductive ball on the pads through the metal film.Type: GrantFiled: July 16, 2008Date of Patent: October 5, 2010Assignee: Shinko Electric Industries Co., Ltd.Inventors: Kei Imafuji, Masao Nakazawa, Masaki Sanada, Sachiko Oda, Tadashi Kodaira, Kinji Nagata, Masaru Yamazaki, Kenjiro Enoki
-
Publication number: 20090023281Abstract: A solder bump forming method of carrying out a reflow treatment over a conductive ball mounted on a plurality of pads, thereby forming a solder bump, includes a metal film forming step of forming a metal film capable of chemically reacting to a tackifying compound on the pads, an organic sticking layer forming step of causing a solution containing the tackifying compound to chemically react to the metal film, thereby forming an organic sticking layer on the metal film, and a conductive ball mounting step of supplying the conductive ball on the pads having the organic sticking layer formed thereon, thereby mounting the conductive ball on the pads through the metal film.Type: ApplicationFiled: July 16, 2008Publication date: January 22, 2009Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Kei Imafuji, Masao Nakazawa, Masaki Sanada, Sachiko Oda, Tadashi Kodaira, Kinji Nagata, Masaru Yamazaki, Kenjiro Enoki