Abstract: This invention provides a high speed controller and switching mode power supply. The high speed controller includes PWM control chip, providing high speed PWM function; output circuit: sending out PWM working signal or frequency modulation working signal. FM enhancement network: inducing feedback signals from CFB and VFB circuitry to vary the oscillation frequency of the PWM control chip, and boost up the frequency modulation function. The FM enhancement network is an unique circuitry to alter the operation characteristics of the PWM control chip. In this respect the high speed controller can be regarded as a new PWM/FM controller which can work simultaneously both in PWM mode and in FM mode in accordance to the load conditions of DC/DC converter output. The efficiency of medium to high power supply using the new design as controller IC would increase at least 5% to 8% higher than other power supplies.

Abstract: Apparatus and methods are disclosed for OTEC plant. The device can be deployed in ocean with depth of 600 meter or more.

Abstract: Apparatus for providing energy management with automation control features are invented. Power consumption details for building or household can be known as well as the expected power bill in advance. The operation status of specific appliance can also be monitored and controlled. Wireless technology is used as a communication medium with a plurality of appliances which facilitates the management of energy consumption with different applications, like checking the operation status, operating hours and consumption data. An advanced feature of communication with the utility provides power information and instant messaging to users. A consumption target can also be set to economize the electricity bill.

Abstract: Apparatus and methods are disclosed for OTEC plant. The device can be deployed in ocean with depth of 600 meter or more.

Abstract: A method of fabricating AlGaN/GaN enhancement-mode heterostructure field-effect transistors (HFET) using fluorine-based plasma immersion or ion implantation. The method includes: 1) generating gate patterns; 2) exposing the AlGaN/GaN heterostructure in the gate region to fluorine-based plasma treatment with photoresist as the treatment mask in a self-aligned manner; 3) depositing the gate metal to the plasma treated AlGaN/GaN heterostructure surface; 4) lifting off the metal except the gate electrode; and 5) high temperature post-gate annealing of the sample. This method can be used to shift the threshold voltage of a HFET toward a more positive value, and ultimately convert a depletion-mode HFET to an enhancement-mode HFET (E-HFET).

Abstract: A method for and devices utilizing monolithic integration of enhancement-mode and depletion-mode AlGaN/GaN heterojunction field-effect transistors (HFETs) is disclosed. Source and drain ohmic contacts of HFETs are first defined. Gate electrodes of the depletion-mode HFETs are then defined. Gate electrodes of the enhancement-mode HFETs are then defined using fluoride-based plasma treatment and high temperature post-gate annealing of the sample. Device isolation is achieved by either mesa etching or fluoride-based plasma treatment. This method provides a complete planar process for GaN-based integrated circuits favored in high-density and high-speed applications.

Abstract: An integrated circuit chip (10) includes a substrate (12), a plurality of transistors (16) provided in the substrate (12), a circuit pattern (14) provided on a top surface of the substrate (12) and a metal layer (42) comprising at least two metals in substantially eutectic proportions provided on a bottom surface of the substrate, the bottom surface of the metal layer (42) being exposed. The integrated circuit chip (10) can be attached to a further substrate, e.g., a housing, using automated attachment techniques. The chip (10) can be attached to the housing by picking up the integrated circuit chip (10) with the metal layer (42) provided on the bottom surface thereof and placing the integrated circuit chip (10) onto a housing so the bottom surface of the integrated circuit chip (10) faces the housing with the metal layer (42) there between; and then heating the metal layer (42) to a temperature above its eutectic temperature to melt the metal layer and attach the integrated circuit chip (10) to the housing.

Abstract: An integrated circuit chip (10) includes a substrate (12), a plurality of transistors (16) provided in the substrate (12), a circuit pattern (14) provided on a top surface of the substrate (12) and a metal layer (42) comprising at least two metals in substantially eutectic proportions provided on a bottom surface of the substrate, the bottom surface of the metal layer (42) being exposed. The integrated circuit chip (10) can be attached to a farther substrate, e.g., a housing, using automated attachment techniques. The chip (10) can be attached to the housing by picking up the integrated circuit chip (10) with the metal layer (42) provided on the bottom surface thereof and placing the integrated circuit chip (10) onto a housing so the bottom surface of the integrated circuit chip (10) faces the housing with the metal layer (42) there between; and then heating the metal layer (42) to a temperature above its eutectic temperature to melt the metal layer and attach the integrated circuit chip (10) to the housing.

Abstract: A bending mechanism for flexible waveguide uses a combination of an elongate arm (1), two short bracket arms (3 & 7) and a gear train (5, 11, 13 & 9) linking the bracket arms to bend a flexible waveguide (24) over a range of positions. The bend is formed to the shape of a circular arc the radius of which varies with the position. Each short bracket arm is pivotally connected (15 & 17) to a respective end of the elongate arm and to a respective one of the waveguide's two end flanges (23 & 25). Each bracket arm contains a gear that rotates with the respective bracket arm about the bracket arm's pivot; and an even number of gears interlinks those gears whereby pivotal movement of one of the flanges in a clockwise direction produces an effective relative pivotal movement of the other flange.

Abstract: A method of fabricating an electrical interconnect are provided. A first transparent dielectric layer is disposed on top of a support structure. A conductive circuit layer is plated above the first dielectric layer. Separate conductive layers are plated on top of the conductive circuit layer to produce conductive vias. A second transparent dielectric layer is disposed around the conductive layers. Contact tips are electrically connected to the top surface of the separate conductive layers. The interconnect may be visually aligned so that the contact tips brought into contact with target connections. In addition, the support structure may be partially removed to allow a flexible interconnect.

Abstract: A connector is disclosed for electrically coupling groups of contact points formed on a first and second electronic circuit chip. The connector is constructed by applying a layer of dielectric material to a planar electrically conductive base, lithographically printing a pattern onto the dielectric material, etching the pattern and creating a plurality of wells extending through the dielectric material and a matching plurality of cavities in the surface of the base, and electroplating the pattern and filling the wells with an electrically conductive electroplate material. The electroplate thereby forms a plurality of conductive members, each extending through the dielectric material. The base is then removed from the dielectric material, thereby forming a connector board having the conductive members extending therethrough for electrically coupling the first and second groups of contact points on the circuit chips.

Abstract: An electrical interconnect and a method of fabricating an electrical interconnect are provided. A first transparent dielectric layer is disposed on top of a support structure. A conductive circuit layer is plated above the first dielectric layer. Separate conductive layers are plated on top of the conductive circuit layer to produce conductive vias. A second transparent dielectric layer is disposed around the conductive layers. Contact tips are electrically connected to the top surface of the separate conductive layers. The interconnect may be visually aligned so that the contact tips brought into contact with target connections. In addition, the support structure may be partially removed to allow a flexible interconnect.

Abstract: An apparatus for the bending of a flexible conduit having first and second ends includes first and second assemblies which are fixed for relative rotation with the first and second ends. An axis of rotation passes through the first and second assemblies. The apparatus further includes a driven gear fixed for rotation with the first assembly. The driven gear is adapted to cooperate with a drive gear to rotate the first assembly with respect to the second assembly. The first assembly includes a first extendable portion which attaches directly to the first end. Similarly, the second assembly includes a second extendable portion which attaches directly to the second end. The first and second assemblies function to vary the distance between the axis of rotation and the first and second ends as the first assembly is rotated with respect to the second assembly.

Abstract: This invention discloses a semiconductor bulk acoustic resonator including at least one thin film piezoelectric layer positioned on a semiconductor substrate. The acoustic resonator includes a heating ring positioned around the outer perimeter of the piezoelectric layer in order to heat the piezoelectric layer to a desirable elevated temperature. A heat sensing film fabricated on the piezoelectric layer monitors the temperature of the piezoelectric layer such that the heating ring maintains the piezoelectric layer at a constant temperature. By this, an oscillator circuit using this semiconductor bulk acoustic resonator as the frequency controlling element can maintain a constant frequency over a wide range of temperatures which may affect frequency stability.