Patents by Inventor Kei Matsumoto

Kei Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210201376
    Abstract: The present disclosure provides a technique that enables customization of a vehicle. In an information processing apparatus, a controller presents vehicle units extracted from among a plurality of types of under units each of which is provided with a driving mechanism configured to cause wheels to rotate and a plurality of types of upper units to be loaded on any of the under units to a user, the vehicle units being combinable as a vehicle. Furthermore, the controller executes: accepting selection by a user from among the presented vehicle units; and calculating a fee in the case of providing the selected vehicle units.
    Type: Application
    Filed: December 10, 2020
    Publication date: July 1, 2021
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hiroki YABUSHITA, Keiichi KONDO, Kaori TAKAHASHI, Jin XIN, Daisuke MIZUSHIMA, Satoru ANDO, Takeshi MURAKAMI, Yuchi YAMANOUCHI, Kenta MIYAHARA, Katsuhisa YOSHIKAWA, Yuji SUZUKI, Keita YAMAZAKI, Kei MATSUMOTO, Hiroyuki ITO, Takashi OGAWA, Yukiya SUGIYAMA, Masaru ANDO, So SAWAHIRA, Rina MUKAI, Azusa NAKAGAME, Erina TOYAMA, Yasushi FUJIWARA
  • Publication number: 20210174311
    Abstract: An information processing apparatus disclosed has a controller configured to execute the processing of, when a first vehicle body unit on which a first vending machine is mounted is laid at a specific place, determining a time for maintenance defined as a time to perform maintenance of the first vending machine, and sending a replacement command to a chassis unit that is configured in such a way as to be capable of travelling autonomously and being coupled to and separated from a vehicle body unit, as per the time for maintenance. The replacement command is a command to transport a second vehicle body unit on which a second vending machine is mounted to the specific place and retrieve the first vehicle body unit from the specific place.
    Type: Application
    Filed: December 2, 2020
    Publication date: June 10, 2021
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Katsuhisa YOSHIKAWA, Yuji Suzuki, Keita Yamazaki, Kei Matsumoto, Hiroyuki Ito, Takashi Ogawa, Yukiya Sugiyama, Masaru Ando, Yasushi Fujiwara, Azusa Nakagame, Erina Toyama
  • Patent number: 10873091
    Abstract: The present invention is a method for producing a porous metal body or a method for producing an electrode catalyst, which is capable of simplifying the production process and improving the production efficiency by not requiring a step of immersion in an acid treatment solution. A method for producing a porous metal body according to the present invention comprises: a step for forming a metal resin-containing layer, which contains a metal and a resin that has a lower melting point than the metal, on a base; and a step for obtaining a porous metal body by subjecting the metal resin-containing layer to a heat treatment, thereby sintering the metal and removing the resin from the metal resin-containing layer.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: December 22, 2020
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Seiichi Kouketsu, Kei Matsumoto, Yu Wakakuwa
  • Patent number: 10666066
    Abstract: A differential voltage measurement device includes a first capacitor, a second capacitor of which the capacity is smaller than that of the first capacitor, a differential amplification unit which outputs a voltage according to a differential voltage between a voltage held in the first capacitor and a voltage held in the second capacitor, and a control unit which guides a first voltage to the first capacitor and guides a second voltage to the second capacitor in a state where the first capacitor holds the first voltage.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: May 26, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Jian Wang, Hironao Fujii, Kei Matsumoto
  • Patent number: 10627450
    Abstract: Provided is a battery state detection device suitable for detecting a state of a battery mounted on a vehicle. A ?COM uses a first capacitor to measure a first sample of battery voltage, and after a predetermined standby time has elapsed, executes sample hold processing using the second capacitor for performing the second sample hold of the battery voltage. The ?COM detects the state of the battery based on the output of the differential amplifier when a condition is satisfied that the battery current is constant during both the first sample hold and the second sample hold and the battery current fluctuates during the standby time.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: April 21, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Hironao Fujii, Jian Wang, Kei Matsumoto
  • Publication number: 20190198884
    Abstract: The present invention is a method for producing a porous metal body or a method for producing an electrode catalyst, which is capable of simplifying the production process and improving the production efficiency by not requiring a step of immersion in an acid treatment solution. A method for producing a porous metal body according to the present invention comprises: a step for forming a metal resin-containing layer, which contains a metal and a resin that has a lower melting point than the metal, on a base; and a step for obtaining a porous metal body by subjecting the metal resin-containing layer to a heat treatment, thereby sintering the metal and removing the resin from the metal resin-containing layer.
    Type: Application
    Filed: March 28, 2017
    Publication date: June 27, 2019
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Seiichi Kouketsu, Kei Matsumoto, Yu Wakakuwa
  • Publication number: 20180210032
    Abstract: Provided is a battery state detection device suitable for detecting a state of a battery mounted on a vehicle. A ?COM uses a first capacitor to measure a first sample of battery voltage, and after a predetermined standby time has elapsed, executes sample hold processing using the second capacitor for performing the second sample hold of the battery voltage. The ?COM detects the state of the battery based on the output of the differential amplifier when a condition is satisfied that the battery current is constant during both the first sample hold and the second sample hold and the battery current fluctuates during the standby time.
    Type: Application
    Filed: November 29, 2017
    Publication date: July 26, 2018
    Applicant: Yazaki Corporation
    Inventors: Hironao FUJII, Jian WANG, Kei MATSUMOTO
  • Patent number: 9842779
    Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor wafer that has been subjected to a heat treatment, which comprises obtaining analysis values by analyzing a plurality of analysis points on a surface of the semiconductor wafer by a first analysis method or a second analysis method, wherein in the first analysis method, analysis values employed in evaluation decrease as an amount of contamination by a metal element that is to be evaluated increases, and in the second analysis method, analysis values employed in evaluation increase as an amount of contamination by a metal element that is to be evaluated increases, and wherein determination of presence or absence of localized contamination by the metal element that is to be evaluated is made by evaluating the analysis values based on the normal value specified by a probability distribution function.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: December 12, 2017
    Assignee: SUMCO CORPORATION
    Inventors: Kei Matsumoto, Kazutaka Eriguchi, Noritomo Mitsugi, Tsuyoshi Kubota
  • Publication number: 20170187201
    Abstract: A differential voltage measurement device includes a first capacitor, a second capacitor of which the capacity is smaller than that of the first capacitor, a differential amplification unit which outputs a voltage according to a differential voltage between a voltage held in the first capacitor and a voltage held in the second capacitor, and a control unit which guides a first voltage to the first capacitor and guides a second voltage to the second capacitor in a state where the first capacitor holds the first voltage.
    Type: Application
    Filed: December 19, 2016
    Publication date: June 29, 2017
    Inventors: Jian Wang, Hironao Fujii, Kei Matsumoto
  • Patent number: 9372223
    Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor sample by DLTS method, which includes obtaining a first DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal being generated by alternatively and cyclically applying to a semiconductor junction on a semiconductor sample a reverse voltage VR to form a depletion layer and a weak voltage V1 to trap carriers in the depletion layer; obtaining a second DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal is being generated by cyclically applying the VR to the semiconductor junction; obtaining a differential spectrum of the first DLTS spectrum with a correction-use spectrum in the form of the second DLTS spectrum or a spectrum that is obtained by approximating the second DLTS spectrum as a straight line or as a curve.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: June 21, 2016
    Assignee: SUMCO CORPORATION
    Inventors: Kei Matsumoto, Ryuji Ohno
  • Publication number: 20150318222
    Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor wafer that has been subjected to a heat treatment, which comprises obtaining analysis values by analyzing a plurality of analysis points on a surface of the semiconductor wafer by a first analysis method or a second analysis method, wherein in the first analysis method, analysis values employed in evaluation decrease as an amount of contamination by a metal element that is to be evaluated increases, and in the second analysis method, analysis values employed in evaluation increase as an amount of contamination by a metal element that is to be evaluated increases, and wherein determination of presence or absence of localized contamination by the metal element that is to be evaluated is made by evaluating the analysis values based on the normal value specified by a probability distribution function.
    Type: Application
    Filed: January 24, 2014
    Publication date: November 5, 2015
    Applicant: SUMCO CORPORATION
    Inventors: Kei MATSUMOTO, Kazutaka ERIGUCHI, Noritomo MITSUGI, Tsuyoshi KUBOTA
  • Publication number: 20140097866
    Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor sample by DLTS method, which includes obtaining a first DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal being generated by alternatively and cyclically applying to a semiconductor junction on a semiconductor sample a reverse voltage VR to form a depletion layer and a weak voltage V1 to trap carriers in the depletion layer; obtaining a second DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal is being generated by cyclically applying the VR to the semiconductor junction; obtaining a differential spectrum of the first DLTS spectrum with a correction-use spectrum in the form of the second DLTS spectrum or a spectrum that is obtained by approximating the second DLTS spectrum as a straight line or as a curve.
    Type: Application
    Filed: June 14, 2012
    Publication date: April 10, 2014
    Applicant: SUMCO CORPORATION
    Inventors: Kei Matsumoto, Ryuji Ohno
  • Patent number: 8421435
    Abstract: In a circuit and method for correcting a delay variation of a subthreshold CMOS circuit operating in a subthreshold region, a power supply voltage controlling circuit is provided for supplying a controlled output voltage to a subthreshold digital CMOS circuit as a controlled power supply voltage. The subthreshold digital CMOS circuit includes CMOS circuits each having a pMOSFET and an nMOSFET and operating in a subthreshold region with a predetermined delay time, and further includes a minute current generator circuit generating a predetermined minute current based on a power supply voltage, and a controlled output voltage generator circuit generating a controlled output voltage for correcting a variation in the delay time based on a generated minute current and supplying the controlled output voltage to the subthreshold digital CMOS circuit as a controlled power supply voltage including a change in each threshold voltage of the pMOSFET and the nMOSFET.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: April 16, 2013
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Tetsuya Hirose, Yuji Osaki, Kei Matsumoto
  • Patent number: 8173523
    Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: May 8, 2012
    Assignee: Sumco Corporation
    Inventors: Noritomo Mitsugi, Masataka Hourai, Shuichi Samata, Kiyoshi Nagai, Kei Matsumoto
  • Publication number: 20110086494
    Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.
    Type: Application
    Filed: October 6, 2010
    Publication date: April 14, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Noritomo Mitsugi, Masataka Hourai, Shuichi Samata, Kiyoshi Nagai, Kei Matsumoto
  • Patent number: 7893001
    Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: February 22, 2011
    Assignee: Hitachi Metals, Ltd.
    Inventors: Takeshi Shimada, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa
  • Publication number: 20110025285
    Abstract: In a circuit and method for correcting a delay variation of a subthreshold CMOS circuit operating in a subthreshold region, a power supply voltage controlling circuit is provided for supplying a controlled output voltage to a subthreshold digital CMOS circuit as a controlled power supply voltage. The subthreshold digital CMOS circuit includes CMOS circuits each having a pMOSFET and an nMOSFET and operating in a subthreshold region with a predetermined delay time, and further includes a minute current generator circuit generating a predetermined minute current based on a power supply voltage, and a controlled output voltage generator circuit generating a controlled output voltage for correcting a variation in the delay time based on a generated minute current and supplying the controlled output voltage to the subthreshold digital CMOS circuit as a controlled power supply voltage including a change in each threshold voltage of the pMOSFET and the nMOSFET.
    Type: Application
    Filed: February 26, 2010
    Publication date: February 3, 2011
    Inventors: Tetsuya HIROSE, Yuji OSAKI, Kei MATSUMOTO
  • Publication number: 20100323877
    Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.
    Type: Application
    Filed: August 12, 2010
    Publication date: December 23, 2010
    Applicant: HITACHI METALS, LTD.
    Inventors: Takeshi SHIMADA, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa
  • Patent number: 7825054
    Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: November 2, 2010
    Assignee: Hitachi Metals, Ltd.
    Inventors: Takeshi Shimada, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa
  • Publication number: 20090233785
    Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.
    Type: Application
    Filed: August 11, 2005
    Publication date: September 17, 2009
    Inventors: Takeshi Shimada, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa