Patents by Inventor Kei Matsumoto
Kei Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210201376Abstract: The present disclosure provides a technique that enables customization of a vehicle. In an information processing apparatus, a controller presents vehicle units extracted from among a plurality of types of under units each of which is provided with a driving mechanism configured to cause wheels to rotate and a plurality of types of upper units to be loaded on any of the under units to a user, the vehicle units being combinable as a vehicle. Furthermore, the controller executes: accepting selection by a user from among the presented vehicle units; and calculating a fee in the case of providing the selected vehicle units.Type: ApplicationFiled: December 10, 2020Publication date: July 1, 2021Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hiroki YABUSHITA, Keiichi KONDO, Kaori TAKAHASHI, Jin XIN, Daisuke MIZUSHIMA, Satoru ANDO, Takeshi MURAKAMI, Yuchi YAMANOUCHI, Kenta MIYAHARA, Katsuhisa YOSHIKAWA, Yuji SUZUKI, Keita YAMAZAKI, Kei MATSUMOTO, Hiroyuki ITO, Takashi OGAWA, Yukiya SUGIYAMA, Masaru ANDO, So SAWAHIRA, Rina MUKAI, Azusa NAKAGAME, Erina TOYAMA, Yasushi FUJIWARA
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Publication number: 20210174311Abstract: An information processing apparatus disclosed has a controller configured to execute the processing of, when a first vehicle body unit on which a first vending machine is mounted is laid at a specific place, determining a time for maintenance defined as a time to perform maintenance of the first vending machine, and sending a replacement command to a chassis unit that is configured in such a way as to be capable of travelling autonomously and being coupled to and separated from a vehicle body unit, as per the time for maintenance. The replacement command is a command to transport a second vehicle body unit on which a second vending machine is mounted to the specific place and retrieve the first vehicle body unit from the specific place.Type: ApplicationFiled: December 2, 2020Publication date: June 10, 2021Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Katsuhisa YOSHIKAWA, Yuji Suzuki, Keita Yamazaki, Kei Matsumoto, Hiroyuki Ito, Takashi Ogawa, Yukiya Sugiyama, Masaru Ando, Yasushi Fujiwara, Azusa Nakagame, Erina Toyama
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Patent number: 10873091Abstract: The present invention is a method for producing a porous metal body or a method for producing an electrode catalyst, which is capable of simplifying the production process and improving the production efficiency by not requiring a step of immersion in an acid treatment solution. A method for producing a porous metal body according to the present invention comprises: a step for forming a metal resin-containing layer, which contains a metal and a resin that has a lower melting point than the metal, on a base; and a step for obtaining a porous metal body by subjecting the metal resin-containing layer to a heat treatment, thereby sintering the metal and removing the resin from the metal resin-containing layer.Type: GrantFiled: March 28, 2017Date of Patent: December 22, 2020Assignee: HONDA MOTOR CO., LTD.Inventors: Seiichi Kouketsu, Kei Matsumoto, Yu Wakakuwa
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Patent number: 10666066Abstract: A differential voltage measurement device includes a first capacitor, a second capacitor of which the capacity is smaller than that of the first capacitor, a differential amplification unit which outputs a voltage according to a differential voltage between a voltage held in the first capacitor and a voltage held in the second capacitor, and a control unit which guides a first voltage to the first capacitor and guides a second voltage to the second capacitor in a state where the first capacitor holds the first voltage.Type: GrantFiled: December 19, 2016Date of Patent: May 26, 2020Assignee: YAZAKI CORPORATIONInventors: Jian Wang, Hironao Fujii, Kei Matsumoto
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Patent number: 10627450Abstract: Provided is a battery state detection device suitable for detecting a state of a battery mounted on a vehicle. A ?COM uses a first capacitor to measure a first sample of battery voltage, and after a predetermined standby time has elapsed, executes sample hold processing using the second capacitor for performing the second sample hold of the battery voltage. The ?COM detects the state of the battery based on the output of the differential amplifier when a condition is satisfied that the battery current is constant during both the first sample hold and the second sample hold and the battery current fluctuates during the standby time.Type: GrantFiled: November 29, 2017Date of Patent: April 21, 2020Assignee: YAZAKI CORPORATIONInventors: Hironao Fujii, Jian Wang, Kei Matsumoto
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Publication number: 20190198884Abstract: The present invention is a method for producing a porous metal body or a method for producing an electrode catalyst, which is capable of simplifying the production process and improving the production efficiency by not requiring a step of immersion in an acid treatment solution. A method for producing a porous metal body according to the present invention comprises: a step for forming a metal resin-containing layer, which contains a metal and a resin that has a lower melting point than the metal, on a base; and a step for obtaining a porous metal body by subjecting the metal resin-containing layer to a heat treatment, thereby sintering the metal and removing the resin from the metal resin-containing layer.Type: ApplicationFiled: March 28, 2017Publication date: June 27, 2019Applicant: HONDA MOTOR CO., LTD.Inventors: Seiichi Kouketsu, Kei Matsumoto, Yu Wakakuwa
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Publication number: 20180210032Abstract: Provided is a battery state detection device suitable for detecting a state of a battery mounted on a vehicle. A ?COM uses a first capacitor to measure a first sample of battery voltage, and after a predetermined standby time has elapsed, executes sample hold processing using the second capacitor for performing the second sample hold of the battery voltage. The ?COM detects the state of the battery based on the output of the differential amplifier when a condition is satisfied that the battery current is constant during both the first sample hold and the second sample hold and the battery current fluctuates during the standby time.Type: ApplicationFiled: November 29, 2017Publication date: July 26, 2018Applicant: Yazaki CorporationInventors: Hironao FUJII, Jian WANG, Kei MATSUMOTO
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Patent number: 9842779Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor wafer that has been subjected to a heat treatment, which comprises obtaining analysis values by analyzing a plurality of analysis points on a surface of the semiconductor wafer by a first analysis method or a second analysis method, wherein in the first analysis method, analysis values employed in evaluation decrease as an amount of contamination by a metal element that is to be evaluated increases, and in the second analysis method, analysis values employed in evaluation increase as an amount of contamination by a metal element that is to be evaluated increases, and wherein determination of presence or absence of localized contamination by the metal element that is to be evaluated is made by evaluating the analysis values based on the normal value specified by a probability distribution function.Type: GrantFiled: January 24, 2014Date of Patent: December 12, 2017Assignee: SUMCO CORPORATIONInventors: Kei Matsumoto, Kazutaka Eriguchi, Noritomo Mitsugi, Tsuyoshi Kubota
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Publication number: 20170187201Abstract: A differential voltage measurement device includes a first capacitor, a second capacitor of which the capacity is smaller than that of the first capacitor, a differential amplification unit which outputs a voltage according to a differential voltage between a voltage held in the first capacitor and a voltage held in the second capacitor, and a control unit which guides a first voltage to the first capacitor and guides a second voltage to the second capacitor in a state where the first capacitor holds the first voltage.Type: ApplicationFiled: December 19, 2016Publication date: June 29, 2017Inventors: Jian Wang, Hironao Fujii, Kei Matsumoto
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Patent number: 9372223Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor sample by DLTS method, which includes obtaining a first DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal being generated by alternatively and cyclically applying to a semiconductor junction on a semiconductor sample a reverse voltage VR to form a depletion layer and a weak voltage V1 to trap carriers in the depletion layer; obtaining a second DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal is being generated by cyclically applying the VR to the semiconductor junction; obtaining a differential spectrum of the first DLTS spectrum with a correction-use spectrum in the form of the second DLTS spectrum or a spectrum that is obtained by approximating the second DLTS spectrum as a straight line or as a curve.Type: GrantFiled: June 14, 2012Date of Patent: June 21, 2016Assignee: SUMCO CORPORATIONInventors: Kei Matsumoto, Ryuji Ohno
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Publication number: 20150318222Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor wafer that has been subjected to a heat treatment, which comprises obtaining analysis values by analyzing a plurality of analysis points on a surface of the semiconductor wafer by a first analysis method or a second analysis method, wherein in the first analysis method, analysis values employed in evaluation decrease as an amount of contamination by a metal element that is to be evaluated increases, and in the second analysis method, analysis values employed in evaluation increase as an amount of contamination by a metal element that is to be evaluated increases, and wherein determination of presence or absence of localized contamination by the metal element that is to be evaluated is made by evaluating the analysis values based on the normal value specified by a probability distribution function.Type: ApplicationFiled: January 24, 2014Publication date: November 5, 2015Applicant: SUMCO CORPORATIONInventors: Kei MATSUMOTO, Kazutaka ERIGUCHI, Noritomo MITSUGI, Tsuyoshi KUBOTA
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Publication number: 20140097866Abstract: An aspect of the present invention relates to a method of evaluating metal contamination in a semiconductor sample by DLTS method, which includes obtaining a first DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal being generated by alternatively and cyclically applying to a semiconductor junction on a semiconductor sample a reverse voltage VR to form a depletion layer and a weak voltage V1 to trap carriers in the depletion layer; obtaining a second DLTS spectrum by measuring a DLTS signal while varying a temperature, the DLTS signal is being generated by cyclically applying the VR to the semiconductor junction; obtaining a differential spectrum of the first DLTS spectrum with a correction-use spectrum in the form of the second DLTS spectrum or a spectrum that is obtained by approximating the second DLTS spectrum as a straight line or as a curve.Type: ApplicationFiled: June 14, 2012Publication date: April 10, 2014Applicant: SUMCO CORPORATIONInventors: Kei Matsumoto, Ryuji Ohno
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Patent number: 8421435Abstract: In a circuit and method for correcting a delay variation of a subthreshold CMOS circuit operating in a subthreshold region, a power supply voltage controlling circuit is provided for supplying a controlled output voltage to a subthreshold digital CMOS circuit as a controlled power supply voltage. The subthreshold digital CMOS circuit includes CMOS circuits each having a pMOSFET and an nMOSFET and operating in a subthreshold region with a predetermined delay time, and further includes a minute current generator circuit generating a predetermined minute current based on a power supply voltage, and a controlled output voltage generator circuit generating a controlled output voltage for correcting a variation in the delay time based on a generated minute current and supplying the controlled output voltage to the subthreshold digital CMOS circuit as a controlled power supply voltage including a change in each threshold voltage of the pMOSFET and the nMOSFET.Type: GrantFiled: February 26, 2010Date of Patent: April 16, 2013Assignee: Semiconductor Technology Academic Research CenterInventors: Tetsuya Hirose, Yuji Osaki, Kei Matsumoto
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Patent number: 8173523Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.Type: GrantFiled: October 6, 2010Date of Patent: May 8, 2012Assignee: Sumco CorporationInventors: Noritomo Mitsugi, Masataka Hourai, Shuichi Samata, Kiyoshi Nagai, Kei Matsumoto
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Publication number: 20110086494Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.Type: ApplicationFiled: October 6, 2010Publication date: April 14, 2011Applicant: SUMCO CORPORATIONInventors: Noritomo Mitsugi, Masataka Hourai, Shuichi Samata, Kiyoshi Nagai, Kei Matsumoto
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Patent number: 7893001Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.Type: GrantFiled: August 12, 2010Date of Patent: February 22, 2011Assignee: Hitachi Metals, Ltd.Inventors: Takeshi Shimada, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa
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Publication number: 20110025285Abstract: In a circuit and method for correcting a delay variation of a subthreshold CMOS circuit operating in a subthreshold region, a power supply voltage controlling circuit is provided for supplying a controlled output voltage to a subthreshold digital CMOS circuit as a controlled power supply voltage. The subthreshold digital CMOS circuit includes CMOS circuits each having a pMOSFET and an nMOSFET and operating in a subthreshold region with a predetermined delay time, and further includes a minute current generator circuit generating a predetermined minute current based on a power supply voltage, and a controlled output voltage generator circuit generating a controlled output voltage for correcting a variation in the delay time based on a generated minute current and supplying the controlled output voltage to the subthreshold digital CMOS circuit as a controlled power supply voltage including a change in each threshold voltage of the pMOSFET and the nMOSFET.Type: ApplicationFiled: February 26, 2010Publication date: February 3, 2011Inventors: Tetsuya HIROSE, Yuji OSAKI, Kei MATSUMOTO
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Publication number: 20100323877Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.Type: ApplicationFiled: August 12, 2010Publication date: December 23, 2010Applicant: HITACHI METALS, LTD.Inventors: Takeshi SHIMADA, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa
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Patent number: 7825054Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.Type: GrantFiled: August 11, 2005Date of Patent: November 2, 2010Assignee: Hitachi Metals, Ltd.Inventors: Takeshi Shimada, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa
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Publication number: 20090233785Abstract: The invention intends to provide, in BaTiO3 semiconductor porcelain composition, a semiconductor porcelain composition that, without using Pb, can shift the Curie temperature to a positive direction and can significantly reduce the resistivity at room temperature. According to the invention, when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ba is further substituted by a specific amount of a Q element, or when Ba is partially substituted by an A1 element (at least one kind of Na, K and Li) and an A2 element (Bi) and Ti is partially substituted by a specific amount of an M element, the optimal valence control can be applied and whereby the resistivity at room temperature can be significantly reduced. Accordingly, it is optimal for applications in a PTC thermistor, a PTC heater, a PTC switch, a temperature detector and the like, and particularly preferably in an automobile heater.Type: ApplicationFiled: August 11, 2005Publication date: September 17, 2009Inventors: Takeshi Shimada, Kei Matsumoto, Koichi Terao, Kazuya Toji, Kazuhiro Nishikawa