Patents by Inventor Kei TANIGUCHI

Kei TANIGUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250057754
    Abstract: Provided are silicone elastomer particles having a crosslinked structure which is active with respect to biodegradability, and can provide texture and feel during use that is equal to or higher than conventional silicone elastomer particles when blended in a cosmetic composition or the like, a reactive group-containing polycaprolactone compound having a specific structure and useful as a raw material for synthesis reactions, and a method for producing the same. A polycaprolactone compound containing a reactive group having two or more modified polycaprolactone structures has the structural formula (1) as described herein, where in the formula, n is a number in the range 1 to 5 and Ra is a specific (meth)acryl terminal group or alkenyl terminal group, specifically, a compound selected from the aforementioned (meth)acryl-modified polycaprolactone compounds and alkenyl-modified polycaprolactone compounds.
    Type: Application
    Filed: December 23, 2022
    Publication date: February 20, 2025
    Inventors: Tsunehito SUGIURA, Mari WAKITA, Hiroko TANIGUCHI, Liyi TAN, Yasue KANZAKI, Kei NAGAYAMA, Hiro SETOGUCHI
  • Publication number: 20250018692
    Abstract: A co-extruded sheet reduces swelling and/or cracking of the surface occurring during thermal shaping such as vacuum forming and provides improved mechanical strength. A co-extruded sheet contains a polycarbonate resin, and includes a core layer formed from a foam resin and skin layers formed from a non-foaming resin. The skin layer is laminated to one major surface of the core layer, while the skin layer is laminated to the other major surface of the core layer. The core layer has an expansion ratio of 1.6 to 3. The co-extruded sheet has a thickness of 1 to 5 mm and satisfies expression (1): 0.10? (t1+t2)/T?0.5. In expression (1), t1 indicates the thickness of the skin layer, t2 indicates the thickness of the second skin layer, and T indicates the thickness of the co-extruded sheet.
    Type: Application
    Filed: March 29, 2023
    Publication date: January 16, 2025
    Applicant: MAXELL, LTD.
    Inventors: Satoki TANIGUCHI, Atsushi YUSA, Satoshi YAMAMOTO, Toshiharu GOTO, Kei MIZUTANI
  • Publication number: 20190228987
    Abstract: A semiconductor device includes: a chip mounting portion having a lower surface on which a first ditch is formed; a semiconductor chip mounted on an upper surface of the chip mounting portion; a lead electrically connected to a pad of the semiconductor chip through a conductive member; and a sealing body configured to seal the semiconductor chip, wherein the lower surface of the chip mounting portion is exposed from the sealing body, and wherein a plating film is formed on the lower surface including an inside of the first ditch.
    Type: Application
    Filed: April 18, 2018
    Publication date: July 25, 2019
    Inventor: Kei TANIGUCHI
  • Patent number: 9972508
    Abstract: The reliability of a semiconductor device is improved. In a manufacturing method of a semiconductor device, when resin enters a ditch formed on a lower surface of a chip mounting portion by a process of forming a sealing body made of the resin, the resin embedded in the ditch is removed by a process of cleaning the lower surface of the chip mounting portion, and a plating film is formed also on an inner wall of the ditch in a process of forming the plating film on the lower surface of the chip mounting portion.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: May 15, 2018
    Assignee: RENESAS ELECTRONIC CORPORATION
    Inventor: Kei Taniguchi
  • Publication number: 20180033649
    Abstract: The reliability of a semiconductor device is improved. In a manufacturing method of a semiconductor device, when resin enters a ditch formed on a lower surface of a chip mounting portion by a process of forming a sealing body made of the resin, the resin embedded in the ditch is removed by a process of cleaning the lower surface of the chip mounting portion, and a plating film is formed also on an inner wall of the ditch in a process of forming the plating film on the lower surface of the chip mounting portion.
    Type: Application
    Filed: June 24, 2015
    Publication date: February 1, 2018
    Inventor: Kei TANIGUCHI