Patents by Inventor Kei Yoneda

Kei Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7584464
    Abstract: In a multi-processor system constituted by a processor such as a CPU and a DSP, in which the processor and the DSP have an external memory and a bus as shared resources and the DSP carries out a process in response to a processing request from the processor, a monitoring step for status of use includes a step of monitoring the status of use of the DSP, and when contention information obtained in the monitoring step for the status of use indicates frequent uses, an altering step for software process appropriately alters a software processing method to be executed, and switches the corresponding process to an equivalent process so that it becomes possible to avoid bus contention, and consequently to prevent a reduction in the processing speed.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: September 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Kei Yoneda, Isao Kawamoto, Seiji Kita, Takaaki Matsubayashi
  • Publication number: 20080221861
    Abstract: When performing a process in an object to be authenticated, there is a case that an execution result depends on the reference data value to be referenced and remains undefined. When the execution result is undefined and a process after that references the execution result, the execution results may have different values. As a result, the execution results cannot be compared and authentication cannot be continued. There is provided an authentication device for giving the same test pattern to an object to be authenticated and an expectation value generation device, performing simulation, and comparing the execution results. Data being simulated is extracted. According to the analysis result of the extracted data, the simulation is controlled. Alternatively, simulation after the undefined result is obtained is controlled. Thus, it is possible to prevent execution of a process which becomes an undefined result.
    Type: Application
    Filed: January 18, 2005
    Publication date: September 11, 2008
    Inventors: Kei Yoneda, Yoichiro Mae, Hisato Yoshida
  • Publication number: 20060277518
    Abstract: A signal in a hardware description corresponding to a variable or an expression in an operation description is identified so that a tracing description for hardware description for obtaining a transition history of a signal in the hardware description corresponding to a tracing object in the operation description is generated.
    Type: Application
    Filed: June 6, 2006
    Publication date: December 7, 2006
    Inventors: Osamu Mitobe, Kei Yoneda
  • Publication number: 20040168154
    Abstract: In a multi-processor system constituted by a processor such as a CPU and a DSP, in which the processor and the DSP have an external memory and a bus as shared resources and the DSP carries out a process in response to a processing request from the processor, a monitoring step for status of use includes a step of monitoring the status of use of the DSP, and when contention information obtained in the monitoring step for the status of use indicates frequent uses, an altering step for software process appropriately alters a software processing method to be executed, and switches the corresponding process to an equivalent process so that it becomes possible to avoid bus contention, and consequently to prevent a reduction in the processing speed.
    Type: Application
    Filed: December 4, 2003
    Publication date: August 26, 2004
    Inventors: Kei Yoneda, Isao Kawamoto, Seiji Kita, Takaaki Matsubayashi