Abstract: A substrate processing apparatus includes: a mixer configured to mix sulfuric acid as a first component and a second component different from the first component to prepare an etchant; a nozzle configured to eject the etchant to a substrate; a first component supplier including a first flow path that supplies the first component to the mixer, a first instantaneous flowmeter and a first flow rate controller provided in the first flow path; a second component supplier including a second flow path different from the first flow path and configured to supply the second component to the mixer, a second instantaneous flowmeter and a second flow rate controller provided in the second flow path; and a controller configured to control the first and second flow rate controllers using average flow rates of the first component and the second component during the ejection of the etchant to the substrate.

Abstract: An embodiment includes: a semiconductor substrate including a pixel well region and a peripheral well region; a pixel ground line arranged above the pixel well region; a pixel well contact between the pixel ground line and the pixel well region; pixels arranged to form columns in the pixel well region; a reference signal generation circuit arranged in the peripheral well region; and comparator units arranged in the peripheral well region, provided to respective columns, and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor unit between the reference signal generation circuit and the second input node, and a second capacitor unit between the second input node and the pixel ground line.

Abstract: A photoelectric conversion device includes: pixels forming columns and each configured to output a pixel signal; and comparator units provided to respective columns and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor that connects a reference signal line and the second input node, a second capacitor whose one electrode is connected to the second input node, and a select unit that connects the other electrode of the second capacitor to either the reference signal line or a reference voltage line. The other electrode of the second capacitor is connected to the reference signal line during first mode AD conversion and connected to the reference voltage line during second mode AD conversion.

Abstract: A photoelectric conversion device comprising: a first signal transfer unit group having a plurality of signal transfer units which transfer digital signals to a first common output line from a first holding circuit group; and a second signal transfer unit group having a plurality of signal transfer units which transfer digital signals to a second common output line from a second holding circuit group, wherein each of the plurality of signal transfer units is capable of transiting to a second state in which current consumption is less than current consumption in a first state, and, in a predetermined period, a number of the signal transfer units in the second state increases in the first signal transfer unit group and a number of the signal transfer units in the second state decreases in the second signal transfer unit group.

Abstract: A photoelectric conversion device comprising: a first signal transfer unit group having a plurality of signal transfer units which transfer digital signals to a first common output line from a first holding circuit group; and a second signal transfer unit group having a plurality of signal transfer units which transfer digital signals to a second common output line from a second holding circuit group, wherein each of the plurality of signal transfer units is capable of transiting to a second state in which current consumption is less than current consumption in a first state, and, in a predetermined period, a number of the signal transfer units in the second state increases in the first signal transfer unit group and a number of the signal transfer units in the second state decreases in the second signal transfer unit group.

Abstract: An embodiment includes: a semiconductor substrate including a pixel well region and a peripheral well region; a pixel ground line arranged above the pixel well region; a pixel well contact between the pixel ground line and the pixel well region; pixels arranged to form columns in the pixel well region; a reference signal generation circuit arranged in the peripheral well region; and comparator units arranged in the peripheral well region, provided to respective columns, and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor unit between the reference signal generation circuit and the second input node, and a second capacitor unit between the second input node and the pixel ground line.

Abstract: A photoelectric conversion device includes: pixels forming columns and each configured to output a pixel signal; and comparator units provided to respective columns and each configured to receive the pixel signal from the pixels on a corresponding column and the reference signal. Each comparator unit includes a comparator having a first input node that receives the pixel signal and a second input node that receives the reference signal, a first capacitor that connects a reference signal line and the second input node, a second capacitor whose one electrode is connected to the second input node, and a select unit that connects the other electrode of the second capacitor to either the reference signal line or a reference voltage line. The other electrode of the second capacitor is connected to the reference signal line during first mode AD conversion and connected to the reference voltage line during second mode AD conversion.

Abstract: A printed wiring board has a heat transfer pattern facing a heat sink of an electronic component, on a first surface layer on which the electronic component having the heat sink is mounted. The printed wiring board has a through hole conductor formed in a through hole penetrating the printed wiring board corresponding to the heat transfer pattern, and thermally connected to the heat transfer pattern. The heat transfer pattern has a plurality of connecting lands exposed so as to be connectable to the heat sink of the electronic component by solder while being divided by a solder resist. The plurality of the connecting lands include lands adjacent to the through holes, and lands not adjacent to the through holes. The heat dissipation of the electronic component is enhanced while enhancing the connectability of the heat transfer pattern with the heat sink of the electronic component, at being mounted.

Abstract: A printed wiring board has a heat transfer pattern facing a heat sink of an electronic component, on a first surface layer on which the electronic component having the heat sink is mounted. The printed wiring board has a through hole conductor formed in a through hole penetrating the printed wiring board corresponding to the heat transfer pattern, and thermally connected to the heat transfer pattern. The heat transfer pattern has a plurality of connecting lands exposed so as to be connectable to the heat sink of the electronic component by solder while being divided by a solder resist. The plurality of the connecting lands include lands adjacent to the through holes, and lands not adjacent to the through holes. The heat dissipation of the electronic component is enhanced while enhancing the connectability of the heat transfer pattern with the heat sink of the electronic component, at being mounted.