Patents by Inventor Keiichi Akamatsu

Keiichi Akamatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140146099
    Abstract: A display unit includes a plurality of pixels arranged in a two-dimensional matrix. An image is displayed in a first display mode and a second display mode. In the first display mode, one pixel is configured of a set including J (where J is an integer of 2 or more) first unit pixels emitting a first color, J second unit pixels emitting a second color, and J third unit pixels emitting a third color, and image display is performed through control of operation of each of the unit pixels. In the second display mode, one pixel is configured of a set including j (where j is an integer of 1 or more and less than J) first unit pixels, j second unit pixels, and j third unit pixels, and image display is performed through control of operation of each of the unit pixels.
    Type: Application
    Filed: November 13, 2013
    Publication date: May 29, 2014
    Applicant: Sony Corporation
    Inventors: Akihito Nishiike, Keiichi Akamatsu, Kitsuko Hatakeyama, Ryo Kasegawa
  • Publication number: 20120293760
    Abstract: A device includes a substrate, a metal layer being formed in a region on a part of the substrate, and a first insulating film being provided on the substrate and the metal layer and including a trench provided at a position corresponding to a part or all of a region where the metal layer is not provided.
    Type: Application
    Filed: April 27, 2012
    Publication date: November 22, 2012
    Applicant: Sony Corporation
    Inventors: Kenta Masuda, Yuichi Kato, Keiichi Akamatsu
  • Patent number: 6744070
    Abstract: In a thin-film transistor to be used in an active matrix liquid crystal display device, each of a gate signal line, a source signal line, and a drain extraction electrode has a three-layer structure. Specifically, each of these members is made up of a lower layer made of a titanium film, an intermediate layer made of an aluminum film, and an upper layer made of a titanium film containing nitrogen. Since the respective upper layers, in contact with a gate insulating film or an interlayer insulating film made of a silicon nitride film, are made of titanium films containing nitrogen, they have superior adhesion to the silicon nitride film. Consequently, film peeling, etc. during the manufacturing process can be suppressed. Further, providing the titanium film beneath the aluminum film contributes to reduction of the resistance of the aluminum film.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: June 1, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinori Shimada, Masao Kawaguchi, Hiroshi Ishibashi, Yukinobu Nakata, Keiichi Akamatsu
  • Publication number: 20020190334
    Abstract: In a thin-film transistor to be used in an active matrix liquid crystal display device, each of a gate signal line, a source signal line, and a drain extraction electrode has a three-layer structure. Specifically, each of these members is made up of a lower layer made of a titanium film, an intermediate layer made of an aluminum film, and an upper layer made of a titanium film containing nitrogen. Since the respective upper layers, in contact with a gate insulating film or an interlayer insulating film made of a silicon nitride film, are made of titanium films containing nitrogen, they have superior adhesion to the silicon nitride film. Consequently, film peeling, etc. during the manufacturing process can be suppressed. Further, providing the titanium film beneath the aluminum film contributes to reduction of the resistance of the aluminum film.
    Type: Application
    Filed: July 17, 2002
    Publication date: December 19, 2002
    Inventors: Yoshinori Shimada, Masao Kawaguchi, Hiroshi Ishibashi, Yukinobu Nakata, Keiichi Akamatsu
  • Patent number: 6448578
    Abstract: In a thin-film transistor to be used in an active matrix liquid crystal display device, each of a gate signal line, a source signal line, and a drain extraction electrode has a three-layer structure. Specifically, each of these members is made up of a lower layer made of a titanium film, an intermediate layer made of an aluminum film, and an upper layer made of a titanium film containing nitrogen. Since the respective upper layers, in contact with a gate insulating film or an interlayer insulating film made of a silicon nitride film, are made of titanium films containing nitrogen, they have superior adhesion to the silicon nitride film. Consequently, film peeling, etc. during the manufacturing process can be suppressed. Further, providing the titanium film beneath the aluminum film contributes to reduction of the resistance of the aluminum film.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: September 10, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinori Shimada, Masao Kawaguchi, Hiroshi Ishibashi, Yukinobu Nakata, Keiichi Akamatsu
  • Patent number: 6414730
    Abstract: There is provided a liquid crystal display device which utilizes low resistance metal wiring and in which pixel electrodes and drain electrodes can be reliably connected and a method for manufacturing the same. Gate electrodes connected to gate signal lines are formed on a transparent insulating substrate, and a gate insulation film is formed to cover the same. A semiconductor layer, source electrodes and drain electrodes are formed over the gate electrodes, and a metal layer to become source signal lines and source and drain extraction electrodes is formed. The metal layer is formed by stacking a titanium film and an aluminum film. The interlayer insulation film is formed to cover TFTs, gate signal lines and source signal lines. Through holes are formed in the interlayer insulation film to expose at least a part of the periphery of the drain extraction electrodes. Pixel electrodes are formed to cover the through holes.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: July 2, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Keiichi Akamatsu, Yoshinori Shimada