Patents by Inventor Keiichi Hirano
Keiichi Hirano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972743Abstract: A processing system comprises a first integrated circuit (IC) and a second IC. The first IC comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC.Type: GrantFiled: March 8, 2023Date of Patent: April 30, 2024Assignee: Synaptics IncorporatedInventors: Akihito Kumamoto, Keiichi Hirano
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Publication number: 20240064900Abstract: There is provided a multilayer electronic substrate that is reduced in size and thickness while reducing stress applied to a connector. The multilayer electronic substrate includes: a first substrate; a second substrate placed on the first substrate such that surfaces of the first and second substrates face each other; a first connector mounted on the surface of the first substrate and electrically connected to a first wire of the first substrate; a second connector mounted on the surface of the second substrate and electrically connected to a first wire of the second substrate, the second connector being directly connected to the first connector; and a wiring member having flexibility, the wiring member having one end electrically connected to a second wire of the first substrate and another end electrically connected to a second wire of the second substrate, to electrically connect the second wire of the first substrate and the second wire of the second substrate.Type: ApplicationFiled: December 23, 2021Publication date: February 22, 2024Inventors: KANAHIRO SHIROTA, KEIICHI HIRANO
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Publication number: 20230237977Abstract: A processing system comprises a first integrated circuit (IC) and a second IC. The first IC comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC.Type: ApplicationFiled: March 8, 2023Publication date: July 27, 2023Inventors: Akihito Kumamoto, Keiichi Hirano
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Patent number: 11657784Abstract: A processing system comprises a first integrated circuit (IC) and a second IC. The first IC comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC.Type: GrantFiled: May 6, 2021Date of Patent: May 23, 2023Assignee: SYNAPTICS INCORPORATEDInventors: Akihito Kumamoto, Keiichi Hirano
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Patent number: 11452201Abstract: To provide an electronic device and a connecting component which have a shield function and which enable downsizing. The electronic device includes: a substrate having a first substrate portion and a second substrate portion that is arranged at a position facing the first substrate portion; a plurality of potential wirings which are connected to the first substrate portion and to the second substrate portion and which have an arbitrary potential; and a plurality of signal wirings which are connected to the first substrate portion and to the second substrate portion and to which a signal is supplied. The first substrate portion has a mounting region of an electronic component on a side of a surface facing the second substrate portion. The plurality of potential wirings are arranged outside of the mounting region.Type: GrantFiled: September 5, 2019Date of Patent: September 20, 2022Assignee: SONY CORPORATIONInventors: Keiichi Hirano, Akihiro Horii, Yoshiyuki Nomura, Keiji Niina, Kosuke Sakazume
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Publication number: 20220271708Abstract: Provided is a rotary apparatus (1) which includes: a rotary part (4) which rotates by being imparted an external force; a rotation regulating part (3) which regulates rotation of the rotary part (4) in one direction; and an attaching part (2) which allows the rotary part (4) to be attached in a state of being contactable with a contact part, and by sliding the rotary part (4) and the contact part with each other, a light receiving part (P) which receives light for a solar battery panel is cleaned.Type: ApplicationFiled: June 2, 2020Publication date: August 25, 2022Inventor: KEIICHI HIRANO
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Publication number: 20220256708Abstract: Provided are an electronic apparatus and a substrate capable of reducing the size and the cost thereof regardless of whether or not a shielding function is needed. An electronic apparatus includes a substrate including a first substrate portion and a second substrate portion arranged in a position opposite the first substrate portion, and a capacitor component arranged between the first substrate portion and the second substrate portion and attached to at least one of the first substrate portion and the second substrate portion. The capacitor component includes a dielectric, a first electrode located on one side of the dielectric, and a second electrode located through the dielectric on a side opposite to the first electrode. The first substrate portion and the second substrate portion are electrically connected to each other through the first electrode.Type: ApplicationFiled: January 22, 2020Publication date: August 11, 2022Inventor: KEIICHI HIRANO
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Publication number: 20210392740Abstract: To provide an electronic device and a connecting component which have a shield function and which enable downsizing. The electronic device includes: a substrate having a first substrate portion and a second substrate portion that is arranged at a position facing the first substrate portion; a plurality of potential wirings which are connected to the first substrate portion and to the second substrate portion and which have an arbitrary potential; and a plurality of signal wirings which are connected to the first substrate portion and to the second substrate portion and to which a signal is supplied. The first substrate portion has a mounting region of an electronic component on a side of a surface facing the second substrate portion. The plurality of potential wirings are arranged outside of the mounting region.Type: ApplicationFiled: September 5, 2019Publication date: December 16, 2021Inventors: KEIICHI HIRANO, AKIHIRO HORII, YOSHIYUKI NOMURA, KEIJI NIINA, KOSUKE SAKAZUME
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Publication number: 20210256940Abstract: A processing system comprises a first integrated circuit (IC) and a second IC. The first IC comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC.Type: ApplicationFiled: May 6, 2021Publication date: August 19, 2021Inventors: Akihito Kumamoto, Keiichi Hirano
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Patent number: 11030977Abstract: A processing system comprises a first IC chip and a second IC chip. The first IC chip comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC chip.Type: GrantFiled: January 31, 2020Date of Patent: June 8, 2021Assignee: Synaptics IncorporatedInventors: Akihito Kumamoto, Keiichi Hirano
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Publication number: 20210110793Abstract: A processing system comprises a first IC chip and a second IC chip. The first IC chip comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC chip.Type: ApplicationFiled: January 31, 2020Publication date: April 15, 2021Inventors: Akihito KUMAMOTO, Keiichi HIRANO
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Publication number: 20140237273Abstract: An information processing apparatus includes: a wakeup-target identifying section configured to identify a wakeup target in response to a wakeup trigger; and a wakeup processing section configured to wake up the wakeup target identified by the wakeup-target identifying section.Type: ApplicationFiled: December 30, 2013Publication date: August 21, 2014Applicant: Sony CorporationInventors: Keiichi HIRANO, Satoru IWASAKI, Tomohiro KATORI, Ryo TAKAHASHI
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Patent number: 8543329Abstract: An apparatus includes a display displaying a first map representing a position of the apparatus obtained as a result of a first positioning, and further displaying a second map representing the position of the apparatus and being obtained as a result of a second positioning which is started before displaying the first map, the second map being displayed without responding to a request for displaying the position of the apparatus obtained as a result of the second positioning.Type: GrantFiled: February 17, 2012Date of Patent: September 24, 2013Assignee: Renesas Electronics CorporationInventor: Keiichi Hirano
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Publication number: 20120150435Abstract: An apparatus includes a display displaying a first map representing a position of the apparatus obtained as a result of a first positioning, and further displaying a second map representing the position of the apparatus and being obtained as a result of a second positioning which is started before displaying the first map, the second map being displayed without responding to a request for displaying the position of the apparatus obtained as a result of the second positioning.Type: ApplicationFiled: February 17, 2012Publication date: June 14, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Keiichi HIRANO
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Patent number: 8165794Abstract: A positioning method includes performing a first positioning by carrying out information communication with an external part of an positioning apparatus to obtain a first information indicating a position of an object to which the method is applied, displaying a first map representing the position of the object indicated by the first information, performing a second positioning by carrying out information communication with an external part of the positioning apparatus before displaying the first map to obtain a second information indicating the position of the object more precisely than the first information, and displaying a second map representing the position of the positioning apparatus indicated by the second information without responding to another instruction from the user of the positioning after the displaying the first map.Type: GrantFiled: December 15, 2009Date of Patent: April 24, 2012Assignee: Renesas Electronics CorporationInventor: Keiichi Hirano
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Publication number: 20110003981Abstract: A method of producing a radioactive-fluorine-labeled compound has a step of heating in a reaction vessel a mixture containing [18F] fluoride ions, a phase transfer catalyst, potassium ions, and water to evaporate water from the mixture (S10), and in the above step has a step of measuring a temperature of an outlet tube for discharging evaporated water during the heating of the reaction vessel (S12), and the evaporation process is finished at a timing determined based on the result of temperature measurement in the step (S12) of measuring the temperature (S16). Consequently, the amount of water present in the mixture can be controlled to an appropriate range and a stable yield can be achieved in the method of producing a radioactive-fluorine-labeled organic compound.Type: ApplicationFiled: August 31, 2007Publication date: January 6, 2011Applicant: NIHON MEDI-PHYSICS CO., LTD.Inventors: Keiichi Hirano, Taku Ito, Sento Ino
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Publication number: 20100100316Abstract: A positioning method includes performing a first positioning by carrying out information communication with an external part of an positioning apparatus to obtain a first information indicating a position of an object to which the method is applied, displaying a first map representing the position of the object indicated by the first information, performing a second positioning by carrying out information communication with an external part of the positioning apparatus before displaying the first map to obtain a second information indicating the position of the object more precisely than the first information, and displaying a second map representing the position of the positioning apparatus indicated by the second information without responding to another instruction from the user of the positioning after the displaying the first map.Type: ApplicationFiled: December 15, 2009Publication date: April 22, 2010Applicant: NEC Electronics CorporationInventor: Keiichi Hirano
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Patent number: 7657371Abstract: A positioning apparatus having short sensory time for executing the high precision positioning of the user on a map. The positioning apparatus includes: a first positioning unit for obtaining a first position information which represents the position of the positioning apparatus itself measured by carrying out a low precision positioning; a displaying unit for displaying the first position information; and a second positioning unit for obtaining the second position information which represents the position of the positioning apparatus itself measured by carrying out a high precision positioning. The high precision positioning is executed in parallel with the low precision positioning. The displaying unit updates a screen based on the second position information.Type: GrantFiled: March 10, 2006Date of Patent: February 2, 2010Assignee: NEC Electronics CorporationInventor: Keiichi Hirano
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Publication number: 20090281294Abstract: A process for the production of [18F]-TAFDG can produce [18F]-TAFDG in a high radiofluorination yield. A process for the production of an organic compound labeled with radioactive fluorine includes the steps of preparing a reaction solution containing [18F]fluoride ions, a phase transfer catalyst, potassium ions, 1,3,4,6-tetra-O-acetyl-2-O-trifluoromethanesulfonyl-?-D-mannopyranose as a labeling precursor compound and a solvent, and giving a reaction condition to the reaction solution to obtain 1,3,4,6-tetra-O-acetyl-2-[18F]fluoro-2-deoxyglucose, in which the solvent contains water.Type: ApplicationFiled: November 30, 2006Publication date: November 12, 2009Applicant: Nihon Medi-Physics Co., Ltd.Inventors: Keiichi Hirano, Daisaku Nakamura
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Publication number: 20090030192Abstract: A process for the production of [18F]fluoro-2-deoxyglucose can produce [18F]fluoro-2-deoxyglucose in a high and stable yield of synthesis. A process for the production of a compound labeled with radioactive fluorine includes the preparing a reaction solution by adding, under a hermetic condition, TATM and an inert organic solvent to a mixture containing [18F]fluoride ions, a phase transfer catalyst and potassium ions, giving a reaction condition to the reaction solution under a hermetic condition to obtain [18F]-TAFDG, and subjecting the obtained [18F]fluoro-2-deoxyglucose to a deprotection process and, optionally, to a purification process to obtain [18F]fluoro-2-deoxyglucose.Type: ApplicationFiled: November 30, 2006Publication date: January 29, 2009Applicant: Nihon Medi-Physics Co., Ltd.Inventors: Keiichi Hirano, Daisaku Nakamura