Patents by Inventor Keiichi ITAGAKI

Keiichi ITAGAKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10026767
    Abstract: A semiconductor device includes a semiconductor substrate, a photoelectric conversion element, a first isolation insulating film, and a current blocking region. The first isolation insulating film is formed around the photoelectric conversion element. The current blocking region is formed in a region between the photoelectric conversion element and the first isolation insulating film. The current blocking region includes an impurity diffusion layer, and a defect extension preventing layer disposed in contact with the impurity diffusion layer to form a twin with the impurity diffusion layer. The defect extension preventing layer has a different crystal structure from that of the impurity diffusion layer. At least a part of the current blocking region is disposed in contact with the first isolation insulating film.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: July 17, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Keiichi Itagaki
  • Publication number: 20180069038
    Abstract: A semiconductor device includes a semiconductor substrate, a photoelectric conversion element, a first isolation insulating film, and a current blocking region. The first isolation insulating film is formed around the photoelectric conversion element. The current blocking region is formed in a region between the photoelectric conversion element and the first isolation insulating film. The current blocking region includes an impurity diffusion layer, and a defect extension preventing layer disposed in contact with the impurity diffusion layer to form a twin with the impurity diffusion layer. The defect extension preventing layer has a different crystal structure from that of the impurity diffusion layer. At least a part of the current blocking region is disposed in contact with the first isolation insulating film.
    Type: Application
    Filed: November 8, 2017
    Publication date: March 8, 2018
    Inventor: Keiichi ITAGAKI
  • Patent number: 9894293
    Abstract: Provided are a semiconductor device capable of detecting a light of each color with high accuracy without using a color filter, particularly enhancing detection accuracy of charges obtained by photoelectric conversion of a long-wavelength light, and manufacturing and control methods thereof. The semiconductor device has a p type semiconductor substrate, and first, second and third pixel regions. These regions each include a p type well region in the p type semiconductor substrate and an n type region configuring a pn junction therewith. The p type well region of the first pixel region is thinner, from the main surface to the lowermost portion, than that of the second and third pixel regions. On the side opposite to the main surface of the p type well region of the first and second pixel regions, a buried p type well region contiguous to the p type well region is further placed.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: February 13, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Keiichi Itagaki, Tatsuya Kunikiyo
  • Patent number: 9842877
    Abstract: A semiconductor device includes a semiconductor substrate, a photoelectric conversion element, a first isolation insulating film, and a current blocking region. The first isolation insulating film is formed around the photoelectric conversion element. The current blocking region is formed in a region between the photoelectric conversion element and the first isolation insulating film. The current blocking region includes an impurity diffusion layer, and a defect extension preventing layer disposed in contact with the impurity diffusion layer to form a twin with the impurity diffusion layer. The defect extension preventing layer has a different crystal structure from that of the impurity diffusion layer. At least a part of the current blocking region is disposed in contact with the first isolation insulating film.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: December 12, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Keiichi Itagaki
  • Publication number: 20170118419
    Abstract: Provided are a semiconductor device capable of detecting a light of each color with high accuracy without using a color filter, particularly enhancing detection accuracy of charges obtained by photoelectric conversion of a long-wavelength light, and manufacturing and control methods thereof. The semiconductor device has a p type semiconductor substrate, and first, second and third pixel regions. These regions each include a p type well region in the p type semiconductor substrate and an n type region configuring a pn junction therewith. The p type well region of the first pixel region is thinner, from the main surface to the lowermost portion, than that of the second and third pixel regions. On the side opposite to the main surface of the p type well region of the first and second pixel regions, a buried p type well region contiguous to the p type well region is further placed.
    Type: Application
    Filed: January 6, 2017
    Publication date: April 27, 2017
    Inventors: Keiichi ITAGAKI, Tatsuya KUNIKIYO
  • Patent number: 9578263
    Abstract: Provided are a semiconductor device capable of detecting a light of each color with high accuracy without using a color filter, particularly enhancing detection accuracy of charges obtained by photoelectric conversion of a long-wavelength light, and manufacturing and control methods thereof. The semiconductor device has a p type semiconductor substrate, and first, second and third pixel regions. These regions each include a p type well region in the p type semiconductor substrate and an n type region configuring a pn junction therewith. The p type well region of the first pixel region is thinner, from the main surface to the lowermost portion, than that of the second and third pixel regions. On the side opposite to the main surface of the p type well region of the first and second pixel regions, a buried p type well region contiguous to the p type well region is further placed.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: February 21, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Keiichi Itagaki, Tatsuya Kunikiyo
  • Publication number: 20150243702
    Abstract: Provided are a semiconductor device capable of detecting a light of each color with high accuracy without using a color filter, particularly enhancing detection accuracy of charges obtained by photoelectric conversion of a long-wavelength light, and manufacturing and control methods thereof. The semiconductor device has a p type semiconductor substrate, and first, second and third pixel regions. These regions each include a p type well region in the p type semiconductor substrate and an n type region configuring a pn junction therewith. The p type well region of the first pixel region is thinner, from the main surface to the lowermost portion, than that of the second and third pixel regions. On the side opposite to the main surface of the p type well region of the first and second pixel regions, a buried p type well region contiguous to the p type well region is further placed.
    Type: Application
    Filed: February 27, 2015
    Publication date: August 27, 2015
    Inventors: Keiichi ITAGAKI, Tatsuya KUNIKIYO
  • Publication number: 20150145092
    Abstract: A semiconductor device includes a semiconductor substrate, a photoelectric conversion element, a first isolation insulating film, and a current blocking region. The first isolation insulating film is formed around the photoelectric conversion element. The current blocking region is formed in a region between the photoelectric conversion element and the first isolation insulating film. The current blocking region includes an impurity diffusion layer, and a defect extension preventing layer disposed in contact with the impurity diffusion layer to form a twin with the impurity diffusion layer. The defect extension preventing layer has a different crystal structure from that of the impurity diffusion layer. At least a part of the current blocking region is disposed in contact with the first isolation insulating film.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 28, 2015
    Inventor: Keiichi ITAGAKI
  • Publication number: 20110272774
    Abstract: A semiconductor device which has a low-profile laminate structure including an interlayer insulating film and includes an easily formed alignment mark, and a method for manufacturing the semiconductor device. The semiconductor device includes a photoelectric transducer formed in a semiconductor substrate, a stopper film in a mark area, a first interlayer insulating film formed over the stopper film and photoelectric transducer, a first metal interconnect, and a second interlayer insulating film. A through hole which penetrates the first and second interlayer insulating films and reaches the stopper film is made and a first concave is made in the upper surface of a conductive layer in the through hole. A second concave to serve as an alignment mark is made in a second metal interconnect above the first concave.
    Type: Application
    Filed: May 5, 2011
    Publication date: November 10, 2011
    Inventor: Keiichi ITAGAKI