Patents by Inventor Keiichi Maeda
Keiichi Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240147857Abstract: A thermoelectric power generation system 20 includes a heat exchanger 1 having double tubes which are an inner tube 1a and an outer tube 1b, and a thermoelectric power generation module 2 mounted between the inner tube and the outer tube. The thermoelectric power generation module generates thermoelectric power using a temperature difference between a medium inside the inner tube and a medium outside the outer tube, and a highly thermal conductive elastic sheet 3a, 3b is mounted between the thermoelectric power generation module and the inner tube and/or the outer tube in close contact therewith.Type: ApplicationFiled: February 26, 2021Publication date: May 2, 2024Applicants: E-ThermoGentek Co., Ltd., KAWASAKI JUKOGYO KABUSHIKI KAISHA, KAWASAKI THERMAL ENGINEERING CO., LTD.Inventors: Takashi UNO, Nao MAJIMA, Michio OKAJIMA, Keiichi OHATA, Shutaro NAMBU, Makoto GODA, Minoru NAKAYASU, Yoma KANEDA, Masamichi SAKAGUCHI, Takahide YANAGIDA, Yusei MAEDA
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Patent number: 11971633Abstract: An electrode structure includes: a plurality of pixel electrodes arranged separately from each other; and a plurality of dielectric layers laminated in a first direction with respect to the plurality of pixel electrodes, in which the plurality of dielectric layers includes: a first dielectric layer that spreads over the plurality of pixel electrodes in a direction intersecting with the first direction; and a second dielectric layer that includes dielectric material having a refractive index higher than that of the first dielectric layer, sandwiches the first dielectric layer together with the plurality of pixel electrodes, and has a slit at a position overlapping space between pixel electrodes adjacent when viewed from the first direction.Type: GrantFiled: May 15, 2020Date of Patent: April 30, 2024Assignees: SONY SEMICONDUCTOR SOLUTIONS CORPORATION, SONY GROUP CORPORATIONInventors: Takashi Sakairi, Tomoaki Honda, Tsuyoshi Okazaki, Keiichi Maeda, Chiho Araki, Katsunori Dai, Shunsuke Narui, Kunihiko Hikichi, Kouta Fukumoto, Toshiaki Okada, Takuma Matsuno, Yuu Kawaguchi, Yuuji Adachi, Koichi Amari, Hideki Kawaguchi, Seiya Haraguchi, Takayoshi Masaki, Takuya Fujino, Tadayuki Dofuku, Yosuke Takita, Kazuhiro Tamura, Atsushi Tanaka
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Publication number: 20230073217Abstract: A liquid crystal display device includes: a pair of substrates (100, 200); a liquid crystal material layer (300) sandwiched between the pair of substrates; and an optical compensation element (220) having an optical compensation film (224). The optical compensation element includes: a base layer (221) having a serrated cross-sectional shape formed by repeatedly performing a film forming process and an etching process on a surface on which a set of a plurality of grooves having different depths is formed at a predetermined pitch; and an optical compensation film in which a high refractive index film and a low refractive index film are alternately formed on the base layer.Type: ApplicationFiled: December 18, 2020Publication date: March 9, 2023Inventors: TAKUMA MATSUNO, TAKASHI SAKAIRI, KEIICHI MAEDA
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Publication number: 20220390783Abstract: It is an object of the present disclosure to dispose an optical element on a lower surface side of transistors without being influenced by heat treatment in a transistor forming process such that peeling, displacement, and the like do not easily occur. A transistor array substrate includes: a first substrate (110) including transistors (113) arranged in an array; and a second substrate (120) including an optical element (122), in which the transistors are arranged on a front surface side of the first substrate, and the second substrate is bonded to a back surface of the first substrate by plasma bonding treatment.Type: ApplicationFiled: October 19, 2020Publication date: December 8, 2022Inventors: KOICHI AMARI, KOICHI NAGASAWA, HITOSHI TSUNO, YOSHIHIKO KAJIYA, SHINTARO NAKANO, TSUYOSHI OKAZAKI, AKIKO TORIYAMA, YOSHITAKA YAGI, KEIICHI MAEDA, TAKASHI SAKAIRI, TSUTOMU TANAKA
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Publication number: 20220326578Abstract: An electrode structure includes: a plurality of pixel electrodes arranged separately from each other; and a plurality of dielectric layers laminated in a first direction with respect to the plurality of pixel electrodes, in which the plurality of dielectric layers includes: a first dielectric layer that spreads over the plurality of pixel electrodes in a direction intersecting with the first direction; and a second dielectric layer that includes dielectric material having a refractive index higher than that of the first dielectric layer, sandwiches the first dielectric layer together with the plurality of pixel electrodes, and has a slit at a position overlapping space between pixel electrodes adjacent when viewed from the first direction.Type: ApplicationFiled: May 15, 2020Publication date: October 13, 2022Inventors: TAKASHI SAKAIRI, TOMOAKI HONDA, TSUYOSHI OKAZAKI, KEIICHI MAEDA, CHIHO ARAKI, KATSUNORI DAI, SHUNSUKE NARUI, KUNIHIKO HIKICHI, KOUTA FUKUMOTO, TOSHIAKI OKADA, TAKUMA MATSUNO, YUU KAWAGUCHI, YUUJI ADACHI, KOICHI AMARI, HIDEKI KAWAGUCHI, SEIYA HARAGUCHI, TAKAYOSHI MASAKI, TAKUYA FUJINO, TADAYUKI DOFUKU, YOSUKE TAKITA, KAZUHIRO TAMURA, ATSUSHI TANAKA
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Patent number: 11170987Abstract: The short-arc discharge lamp includes a pair of electrodes arranged facing each other inside a light-emitting tube, the pair of electrodes made of a material containing tungsten; a coating formed on the first outer surface of at least one of the pair of electrodes, the coating made of a material containing ceramics; and tungsten particles adhered to a part of the second outer surface of the coating.Type: GrantFiled: June 7, 2021Date of Patent: November 9, 2021Assignee: Ushio Denki Kabushiki KaishaInventors: Akihiro Kuno, Keiichi Maeda
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Patent number: 10908444Abstract: [Object] To provide a display device, a method for producing a display device, and a display apparatus of projection type, which are capable of suppressing deterioration of image quality attributable to a depressed space between pixel electrodes. [Solving Means] A display device of the present disclosure includes pixel electrodes formed for individual pixels and an insulating film for insulation between the pixel electrodes. The insulating film is so formed as to protrude from an electrode surface between the pixel electrodes. A display apparatus of projection type of the present disclosure uses the display device of the present disclosure as a light modulator to module light from a light source. A method for producing a display device of the present disclosure having pixel electrodes formed for individual pixels and an insulating film for insulation between the pixel electrodes includes forming the insulating film as to protrude between the pixel electrodes.Type: GrantFiled: February 19, 2016Date of Patent: February 2, 2021Assignee: SONY CORPORATIONInventors: Takashi Sakairi, Koichi Amari, Chiho Araki, Hitori Tanigawa, Katsumi Kouno, Keiichi Maeda, Takayoshi Masaki, Seiya Haraguchi
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Patent number: 10866467Abstract: A liquid crystal display unit of the present disclosure has a liquid crystal panel having a pixel region including a plurality of pixels, and the liquid crystal panel includes: a first substrate on which a plurality of pixel electrodes having light reflectivity are provided for each of the pixels; a second substrate disposed in opposition to the first substrate; a liquid crystal layer disposed between the first substrate and the second substrate; and an interlayer film provided between the first substrate and the liquid crystal layer, and the interlayer film has a plurality of sloped sections each including at least a portion facing a corresponding one of the plurality of pixel electrodes, and the plurality of sloped sections each have a slope width that faces the corresponding one of the plurality of pixel electrodes and that differs from one another.Type: GrantFiled: October 3, 2017Date of Patent: December 15, 2020Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takashi Sakairi, Koichi Amari, Keiichi Maeda
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Publication number: 20190369448Abstract: A liquid crystal display unit of the present disclosure has a liquid crystal panel having a pixel region including a plurality of pixels, and the liquid crystal panel includes: a first substrate on which a plurality of pixel electrodes having light reflectivity are provided for each of the pixels; a second substrate disposed in opposition to the first substrate; a liquid crystal layer disposed between the first substrate and the second substrate; and an interlayer film provided between the first substrate and the liquid crystal layer, and the interlayer film has a plurality of sloped sections each including at least a portion facing a corresponding one of the plurality of pixel electrodes, and the plurality of sloped sections each have a slope width that faces the corresponding one of the plurality of pixel electrodes and that differs from one another.Type: ApplicationFiled: October 3, 2017Publication date: December 5, 2019Inventors: TAKASHI SAKAIRI, KOICHI AMARI, KEIICHI MAEDA
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Publication number: 20180088396Abstract: A display device of the present disclosure includes pixel electrodes formed for individual pixels and an insulating film for insulation between the pixel electrodes, wherein the insulating film is so formed as to protrude from an electrode surface between the pixel electrodes. A display apparatus of projection type of the present disclosure is provided with the display device of the present disclosure as the light modulator to module light from the light source. A method for producing a display device of the present disclosure having pixel electrodes formed for individual pixels and an insulating film for insulation between the pixel electrodes includes forming the insulating film as to protrude between the pixel electrodes.Type: ApplicationFiled: February 19, 2016Publication date: March 29, 2018Inventors: TAKASHI SAKAIRI, KOICHI AMARI, CHIHO ARAKI, HITORI TANIGAWA, KATSUMI KOUNO, KEIICHI MAEDA, TAKAYOSHI MASAKI, SEIYA HARAGUCHI
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Patent number: 9136304Abstract: A solid-state imaging device includes an imaging element and a logic element. The imaging element includes a first semiconductor substrate, a first wiring layer, and a first metal layer, in which a pixel region which is a light sensing surface is formed. The logic element includes a second semiconductor substrate, a second wiring layer, and a second metal layer, in which a signal processing circuit that processes a pixel signal obtained at the pixel region is formed. The logic element is laminated to the imaging element so that the first metal layer and the second metal layer are bonded to each other, and the first metal layer and the second metal layer are formed on a region excluding a region in which a penetrating electrode layer penetrating a bonding surface of the imaging element and the logic element is formed.Type: GrantFiled: October 19, 2011Date of Patent: September 15, 2015Assignee: SONY CORPORATIONInventor: Keiichi Maeda
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Publication number: 20120105696Abstract: A solid-state imaging device includes an imaging element and a logic element. The imaging element includes a first semiconductor substrate, a first wiring layer, and a first metal layer, in which a pixel region which is a light sensing surface is formed. The logic element includes a second semiconductor substrate, a second wiring layer, and a second metal layer, in which a signal processing circuit that processes a pixel signal obtained at the pixel region is formed. The logic element is laminated to the imaging element so that the first metal layer and the second metal layer are bonded to each other, and the first metal layer and the second metal layer are formed on a region excluding a region in which a penetrating electrode layer penetrating a bonding surface of the imaging element and the logic element is formed.Type: ApplicationFiled: October 19, 2011Publication date: May 3, 2012Applicant: SONY CORPORATIONInventor: Keiichi Maeda
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Publication number: 20110157446Abstract: An image sensor is provided. The image sensor includes a photoelectric conversion portion including a light receiving element; and a well region defined by a wall structure that is formed integrally on the photoelectric conversion portion, wherein the well region is positioned to correspond to the light receiving element of the photoelectric conversion portion. An image sensor device and methods of manufacture are also provided.Type: ApplicationFiled: December 16, 2010Publication date: June 30, 2011Applicant: SONY CORPORATIONInventors: Hiroto Kasai, Tatsuya Minakawa, Yuichi Aki, Makoto Hashimoto, Ayumu Taguchi, Takeshi Yamasaki, Isao Ichimura, Keiichi Maeda
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Patent number: 7851236Abstract: A film thickness prediction method of predicting a film thickness of a second processed layer after planarization includes the steps of: creating first to third actual measurement databases; obtaining a reference film thickness of a second processed layer formed on a region in which no circuit pattern exists; segmenting a first processed layer to be formed on a substrate into grid-like meshes, and obtaining a pattern area ratio occupied by a circuit pattern to be formed on a first processed layer in each mesh and further obtaining a circumferential length of the circuit pattern in each mesh; obtaining an initial thickness of the second processed layer in each mesh; and predicting the film thickness of the second processed layer after planarization from an initial film thickness predicted value and an amount of planarization Hij of the second processed layer in the mesh.Type: GrantFiled: August 3, 2009Date of Patent: December 14, 2010Assignee: Sony CorporationInventors: Kyoko Izuha, Keiichi Maeda, Naoki Komai
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Publication number: 20100035367Abstract: A film thickness prediction method of predicting a film thickness of a second processed layer after planarization includes the steps of: creating first to third actual measurement databases; obtaining a reference film thickness of a second processed layer formed on a region in which no circuit pattern exists; segmenting a first processed layer to be formed on a substrate into grid-like meshes, and obtaining a pattern area ratio occupied by a circuit pattern to be formed on a first processed layer in each mesh and further obtaining a circumferential length of the circuit pattern in each mesh; obtaining an initial thickness of the second processed layer in each mesh; and predicting the film thickness of the second processed layer after planarization from an initial film thickness predicted value and an amount of planarization Hij of the second processed layer in the mesh.Type: ApplicationFiled: August 3, 2009Publication date: February 11, 2010Applicant: SONY CORPORATIONInventors: Kyoko Izuha, Keiichi Maeda, Naoki Komai
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Publication number: 20090019244Abstract: A plurality of sectors 1a, which constitute a flash memory 1, are each divided into a plurality of blocks 1b. Each of the plurality of blocks 1b has a data recording area 1c, and a block state management area 1d for recording data indicating whether data is unrecorded, is recording, or has been recorded in the data recording area 1c. The “recorded” or “recording” makes it possible to easily decide as to whether the record data is reliable, thereby improving the accuracy of the data recording. Dividing the sector to the plurality of blocks 1b can increase the number of times of data rewritings per sector 1a by a factor of N as compared with a conventional system, and reduce the number of times of erasures to 1/N, thereby being able to extend the life of the flash memory 1.Type: ApplicationFiled: June 9, 2005Publication date: January 15, 2009Inventor: Keiichi Maeda
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Patent number: 7261951Abstract: With the objectives of alleviating the property of attacking on the mating member by scratching-off of local agglutinates on the sliding contact surface, achieving improved wear resistance, and achieving improved seizure resistance through restraint of frictional heat generation by a hard phase, a copper based sintered contact material contains shock-resistant ceramics in an amount of 0.05 to less than 0.5 wt % as non-metallic particles composed of one or more substances selected from pulverized oxides, carbides and nitrides. The shock-resistant ceramics are comprised of SiO2 and/or two or more substances selected from SiO2, Al2O3, LiO2, TiO2 and MgO.Type: GrantFiled: January 23, 2004Date of Patent: August 28, 2007Assignee: Komatsu LtdInventors: Takemori Takayama, Tetsuo Ohnishi, Yoshikiyo Tanaka, Keiichi Maeda, Kan'ichi Sato
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Patent number: 7087318Abstract: With the objectives of alleviating the property of attacking on the mating member by scratching-off of local agglutinates on the sliding contact surface, achieving improved wear resistance, and achieving improved seizure resistance through restraint of frictional heat generation by a hard phase, a copper based sintered contact material contains shock-resistant ceramics in an amount of 0.05 to less than 0.5 wt % as non-metallic particles composed of one or more substances selected from pulverized oxides, carbides and nitrides. The shock-resistant ceramics are comprised of SiO2 and/or two or more substances selected from SiO2, Al2O3, LiO2, TiO2 and MgO.Type: GrantFiled: January 23, 2004Date of Patent: August 8, 2006Assignee: Komatsu Ltd.Inventors: Takemori Takayama, Tetsuo Ohnishi, Yoshikiyo Tanaka, Keiichi Maeda, Kan'ichi Sato
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Patent number: 7056598Abstract: With the objectives of alleviating the property of attacking on the mating member by scratching-off of local agglutinates on the sliding contact surface, achieving improved wear resistance, and achieving improved seizure resistance through restraint of frictional heat generation by a hard phase, a copper based sintered contact material contains shock-resistant ceramics in an amount of 0.05 to less than 0.5 wt % as non-metallic particles composed of one or more substances selected from pulverized oxides, carbides and nitrides. The shock-resistant ceramics are comprised of SiO2 and/or two or more substances selected from SiO2, Al2O3, LiO2, TiO2 and MgO.Type: GrantFiled: January 23, 2004Date of Patent: June 6, 2006Assignee: Komatsu, Ltd.Inventors: Takemori Takayama, Tetsuo Ohnishi, Yoshikiyo Tanaka, Keiichi Maeda, Kan'ichi Sato
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Patent number: 6844085Abstract: With the objectives of alleviating the property of attacking on the mating member by scratching-off of local agglutinates on the sliding contact surface, achieving improved wear resistance, and achieving improved seizure resistance through restraint of frictional heat generation by a hard phase, a copper based sintered contact material contains shock-resistant ceramics in an amount of 0.05 to less than 0.5 wt % as non-metallic particles composed of one or more substances selected from pulverized oxides, carbides and nitrides. The shock-resistant ceramics are comprised of SiO2 and/or two or more substances selected from SiO2, Al2O3, LiO2, TiO2 and MgO.Type: GrantFiled: July 12, 2002Date of Patent: January 18, 2005Inventors: Takemori Takayama, Tetsuo Ohnishi, Yoshikiyo Tanaka, Keiichi Maeda, Kan'ichi Sato