Abstract: A phase comparator circuit suited for use in a PLL circuit and for integrated circuit implementation comprises a differential amplifier having a common current path to be turned on and off by a reference signal, means for applying a pedestal or ramp wave signal to be phase-compared with the reference signal to one input terminal of the differential amplifier, and means for branching a current from one of current paths of the differential amplifier. The phase comparator circuit further comprises a load resistor connected between the branching node and a reference D.C. voltage source, and a gate for turning on and off the path between the load resistor and reference D.C. voltage source. The gate is controlled by the reference signal such that the gate conducts in synchronism with the operation of the differential amplifier, that is, when the differential amplifier is in its on-state.