Abstract: Ion implantation is performed on a collector area under an external base area, and a capacitance film is provided on the external base area above the collector area.

Abstract: On a high-concentration n-type first sub-collector layer, a high-concentration n-type second sub-collector layer made of a material having a small bandgap, an i-type or low-concentration n-type collector layer, a high-concentration p-type base layer, an n-type emitter layer made of a material having a large bandgap, a high-concentration n-type emitter cap layer, a high-concentration n-type emitter contact layer made of a material having a small bandgap are sequentially stacked. From the emitter contact layer, an interconnection also serving as an emitter electrode is extended. From the emitter layer or the base layer, an interconnection also serving as a base electrode is extended. From the second sub-collector layer, an interconnection also serving as a collector electrode is extended.

Abstract: A semiconductor device is provided having an improved breakdown voltage on high power output, the semiconductor device comprising a n-type GaAs subcollector layer, a n-type GaAs intermediate collector layer formed between a collector layer and the subcollector layer, the n-type GaAs collector layer, a p-type GaAs base layer, a n-type InGaP second emitter layer, a n-type GaAs first emitter layer, and a n-type InGaAs emitter contact layer, and a concentration of impurities in the intermediate collector layer is higher than a concentration of impurities in the collector layer and is lower than a concentration of impurities in the subcollector layer.

Abstract: There are provided a transistor integrated circuit device which reduces the integrated area of a circuit while avoiding an element destruction caused by thermal runaway, and a method of manufacturing the transistor integrated circuit device. A cut capacitor (13) is composed of an upper electrode formed from a wiring metal and in a first layer; and a lower electrode formed from a wiring metal and in a second layer. A bias resistor (12) is formed from the same wiring metal as that of the lower electrode of the cut capacitor (13). This bias resistor (12) is formed from a wiring metal which is made into a thin film to function as a sheet resistor, and the resistance value of the bias resistor (12) can be freely set according to the thickness or width of the wiring metal.

Abstract: The present invention is directed to provide a driving circuit and driving method for a LCD having high performance of moving image displaying within few amount of memory and downscaled circuit. In the present invention, a voltage applied to a pixel to drive liquid crystal material in the pixel is determined as a voltage with which the transparency of the pixel at the end of the current field becomes the designated transparency. To determine the voltage, a data table for quick response in which output data is stored in correspondence with some of the possible value of a preceding field image data and some of the possible value of the current field image data is employed, and the output data corresponding to the preceding field image data and the current field image data is determined by the data table through linear interpolation. The voltage corresponding to the output data is applied to the pixel.

Abstract: A semiconductor device includes a substrate with a via hole. An electrode is formed on a surface of the substrate so that a portion of the electrode extends through the via hole. A photosensitive resin is formed over the surface so as to cover an aperture of the via hole.

Abstract: The following layers are successively formed on a heavily-doped n-type first subcollector layer: a heavily-doped n-type second subcollector layer made of a material having a small band gap; an i-type or a lightly-doped n-type collector layer; a heavily-doped p-type base layer; an n-type emitter layer made of a material having a large band gap; a heavily-doped n-type emitter cap layer; and a heavily-doped n-type emitter contact layer made of a material having a small band gap. Alloying reaction layers are formed under an emitter electrode, a base electrode and a collector electrode.

Abstract: The following layers are successively formed on a heavily-doped n-type first subcollector layer: a heavily-doped n-type second subcollector layer made of a material having a small band gap; an i-type or a lightly-doped n-type collector layer; a heavily-doped p-type base layer; an n-type emitter layer made of a material having a large band gap; a heavily-doped n-type emitter cap layer; and a heavily-doped n-type emitter contact layer made of a material having a small band gap. Alloying reaction layers are formed under an emitter electrode, a base electrode and a collector electrode.

Abstract: A GaAs substrate 200 is rotated, a photosensitive silicone resist 260 is applied on a surface of the GaAs substrate 200 on which an aperture of a hole 310 to be a via hole, and an inside of the hole 310 to be the via hole is filled in with the photosensitive silicone resist 260. Next, the GaAs substrate 200 is further rotated, changing the number of revolutions (rpm), and the photosensitive silicone resist 260 on the GaAs substrate is flattened. Next, a reverse side of the GaAs substrate is grinded, the hole 310 to be the via hole penetrates the GaAs substrate 200 from the surface to the reverse side and the via hole 220 is formed. Next, a reverse side electrode 240 is formed on the reverse side of the GaAs substrate 200. Next, the GaAs sustrate 200 is divided chip by chip and chips are laid on a substrate for assembly 270 via an adhesive metal 280.

Abstract: The present invention aims at providing a heterojunction bipolar transistor having improved breakdown voltage on operation for high power output, and includes: a GaAs semiconductor substrate 100; an n+-type GaAs sub-collector layer 110; an n-type GaAs collector layer 120; a p-type GaAs base layer 130; an emitter layer 140; an n-type GaAs emitter cap layer 150; and an n-type InGaAs emitter contact layer 160. The emitter layer 140 has a multilayer structure including an n-type or non-doped first emitter layer 141 and an n-type second emitter layer 142 which are laminated in sequence. The first emitter layer 141 is made of a semiconductor material including Al, while the second emitter layer 142 is made of InxGa1-xP (0<x<1).

Abstract: A heterojunction bipolar transistor comprises a collector layer, a base layer formed on the collector layer and an emitter layer formed on the base layer. The emitter layer includes a first semiconductor layer covering the entire top surface of the base layer and a second semiconductor layer formed on a predetermined part of the first semiconductor layer. An inactivated region is formed, by ion implantation, in a region of the collector layer located below the base layer except for a part thereof corresponding to the second semiconductor layer. The edge of the inactivated region is located away from the edge of the second semiconductor layer, and a region of the first semiconductor layer between the edge of the inactivated region and the edge of the second semiconductor layer is depleted.

Abstract: A hetero-junction bipolar transistor that satisfies high resistance required to avoid a potential breakdown includes: an n-type sub-collector layer 110 that is made of GaAs; an n-type first collector 121 that is made of a semiconductor material with a smaller avalanche coefficient than that of the sub-collector 110 and is formed on the sub-collector layer 110; a second collector layer 132 that is made of n-type or i-type GaAs with lower dopant concentration than that of the sub-collector layer 110 and is formed on the first collector layer 121; a p-type base layer 133 that is made of GaAs and is formed on the second collector layer 132; and emitter layer 134 that is made of a semiconductor material with a larger band gap than that of the base layer 133 and is formed on the base layer 133.

Abstract: It is the object of the present invention to provide a semiconductor device having an improved breakdown voltage on high power output, the semiconductor device comprising a n-type GaAs subcollector layer 101, a n-type GaAs intermediate collector layer 102 formed between a collector layer 103 and the subcollector layer 101, the n-type GaAs collector layer 103, a p-type GaAs base layer 104, a n-type InGaP second emitter layer 105, a n-type GaAs first emitter layer 106, and a n-type InGaAs emitter contact layer 107, and a concentration of impurities in the intermediate collector layer 102 is higher than a concentration of impurities in the collector layer 103 and is lower than a concentration of impurities in the subcollector layer 101.

Abstract: A hetero-junction bipolar transistor that satisfies high resistance required to avoid a potential breakdown includes: an n-type sub-collector layer 110 that is made of GaAs; an n-type first collector 121 that is made of a semiconductor material with a smaller avalanche coefficient than that of the sub-collector 110 and is formed on the sub-collector layer 110; a second collector layer 132 that is made of n-type or i-type GaAs with lower dopant concentration than that of the sub-collector layer 110 and is formed on the first collector layer 121; a p-type base layer 133 that is made of GaAs and is formed on the second collector layer 132; and emitter layer 134 that is made of a semiconductor material with a larger band gap than that of the base layer 133 and is formed on the base layer 133.

Abstract: A liquid crystal display device comprising a including signal correcting means correction for correcting a level of an original image signal to a level with which transmittance in a steady state of the pixel with the original image signal is attained within one frame period, a horizontal driving means for driver applying a voltage in correspondence with the corrected image signal to a liquid crystal material, and an illumination device for illuminating the display panel with a plurality of light emitting regions thereof, said the light emitting regions sequentially turns turning on and off in synchronization with the application of the corrected image signal, while holding a definite time delay thereto.

Abstract: The present invention is directed to provide a driving circuit and driving method for a LCD having high performance of moving image displaying within few amount of memory and downscaled circuit. In the present invention, a voltage applied to a pixel to drive liquid crystal material in the pixel is determined as a voltage with which the transparency of the pixel at the end of the current field becomes the designated transparency. To determine the voltage, a data table for quick response in which output data is stored in correspondence with some of the possible value of a preceding field image data and some of the possible value of the current field image data is employed, and the output data corresponding to the preceding field image data and the current field image data is determined by the data table through linear interpolation. The voltage corresponding to the output data is applied to the pixel.

Abstract: A GaAs substrate 200 is rotated, a photosensitive silicone resist 260 is applied on a surface of the GaAs substrate 200 on which an aperture of a hole 310 to be a via hole, and an inside of the hole 310 to be the via hole is filled in with the photosensitive silicone resist 260. Next, the GaAs substrate 200 is further rotated, changing the number of revolutions (rpm), and the photosensitive silicone resist 260 on the GaAs substrate is flattened. Next, a reverse side of the GaAs substrate is grinded, the hole 310 to be the via hole penetrates the GaAs substrate 200 from the surface to the reverse side and the via hole 220 is formed. Next, a reverse side electrode 240 is formed on the reverse side of the GaAs substrate 200. Next, the GaAs sustrate 200 is divided chip by chip and chips are laid on a substrate for assembly 270 via an adhesive metal 280.

Abstract: A hetero-junction bipolar transistor that satisfies high resistance required to avoid a potential breakdown includes: an n-type sub-collector layer 110 that is made of GaAs; an n-type first collector 121 that is made of a semiconductor material with a smaller avalanche coefficient than that of the sub-collector 110 and is formed on the sub-collector layer 110; a second collector layer 132 that is made of n-type or i-type GaAs with lower dopant concentration than that of the sub-collector layer 110 and is formed on the first collector layer 121; a p-type base layer 133 that is made of GaAs and is formed on the second collector layer 132; and emitter layer 134 that is made of a semiconductor material with a larger band gap than that of the base layer 133 and is formed on the base layer 133.

Abstract: The present invention is directed to provide a driving circuit and driving method for a LCD having high performance of moving image displaying within few amount of memory and downscaled circuit. In the present invention, a voltage applied to a pixel to drive liquid crystal material in the pixel is determined as a voltage with which the transparency of the pixel at the end of the current field becomes the designated transparency. To determine the voltage, a data table for quick response in which output data is stored in correspondence with some of the possible value of a preceding field image data and some of the possible value of the current field image data is employed, and the output data corresponding to the preceding field image data and the current field image data is determined by the data table through linear interpolation. The voltage corresponding to the output data is applied to the pixel.

Abstract: A liquid crystal display device comprising a signal correcting means for correcting a level of an original image signal to a level with which transmittance in a steady state of the pixel with the original image signal is attained within one frame period, a horizontal driving means for applying a voltage in correspondence with the corrected image signal to liquid crystal, and an illumination device for illuminating the display panel with a plurality of light emitting regions thereof, said light emitting regions sequentially turns on and off in synchronization with the application of the corrected image signal while holding a definite time delay thereto.