Patents by Inventor Keiichi Teranisi

Keiichi Teranisi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7933663
    Abstract: A safety master configured to communicate with a plurality of safety slaves over a safety field network or with a plurality of safety local I/O units connected by a safety back plane bus of the safety master, wherein each of the plurality of safety slaves and safety local I/O units allow connection to safety I/O devices in a plurality of cell equipment, and wherein the safety master receives a status signal indicating a “safe state” or an “unsafe state” related to cell equipment from each of the corresponding plurality of safety slaves or safety local I/O units, and controls operation/stop of cell equipment by executing an interlock operation program with the received status signal as an input to output an operation instruction signal.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: April 26, 2011
    Assignee: Omron Corporation
    Inventors: Keiichi Teranisi, Naoaki Ikeno, Toshiyuki Nakamura, Takehiko Hioka, Yasuki Yoda, Isao Yamashita
  • Publication number: 20090171472
    Abstract: A safety master configured to communicate with a plurality of safety slaves over a safety field network or with a plurality of safety local I/O units connected by a safety back plane bus of the safety master, wherein each of the plurality of safety slaves and safety local I/O units allow connection to safety I/O devices in a plurality of cell equipment, and wherein the safety master receives a status signal indicating a “safe state” or an “unsafe state” related to cell equipment from each of the corresponding plurality of safety slaves or safety local I/O units, and controls operation/stop of cell equipment by executing an interlock operation program with the received status signal as an input to output an operation instruction signal.
    Type: Application
    Filed: December 8, 2008
    Publication date: July 2, 2009
    Inventors: Keiichi TERANISI, Naoaki IKENO, Toshiyuki NAKAMURA, Takehiko HIOKA, Yasuki YODA, Isao YAMASHITA
  • Publication number: 20090024230
    Abstract: The arrangement of the function block to the programming field is performed according to the guide by a function block arrangement template in which block arrangeable positions are defined vertically and horizontally and in which one end side in a row direction is defined as an input terminal side and the other end side is defined as an output terminal side; and the template is separated into an input side template positioned on an input side and including a series of plural columns respectively accepting the arrangement of a predetermined type of function block related to an input signal, and an output side template positioned on an output side and including a series of plural columns respectively accepting the arrangement of a predetermined type of function block related to an output signal.
    Type: Application
    Filed: June 11, 2008
    Publication date: January 22, 2009
    Inventors: Takehiko HIOKA, Keiichi TERANISI, Yoshihiro DEMURA