Patents by Inventor Keiichiro GESHI

Keiichiro GESHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11545356
    Abstract: Provided is a polycrystalline ceramic substrate to be bonded to a compound semiconductor substrate with a bonding layer interposed therebetween, wherein at least one of relational expression (1) 0.7<?1/?2<0.9 and relational expression (2) 0.7<?3/?4<0.9 holds, where ?1 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 300° C. and ?2 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 300° C., and ?3 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 1000° C. and ?4 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 1000° C.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: January 3, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiichiro Geshi, Shigeru Nakayama, Masashi Yoshimura
  • Publication number: 20220069802
    Abstract: Provided is a joined body including a piezoelectric substrate and a polycrystalline spinel substrate provided on one main surface of the piezoelectric substrate, wherein the polycrystalline spinel substrate has a porosity of 0.005% or more and 0.6% or less.
    Type: Application
    Filed: January 18, 2019
    Publication date: March 3, 2022
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hirohisa SAITO, Shigeru NAKAYAMA, Yoshihiro IMAGAWA, Keiichiro GESHI, Yuichiro YAMANAKA
  • Patent number: 10340886
    Abstract: A ceramic substrate is formed of a polycrystalline ceramic and has a supporting main surface. The supporting main surface has a roughness of 0.01 nm or more and 3.0 nm or less in terms of Sa. The number of projections and depressions with a height of 1 nm or more in a square region with 50 ?m sides on the supporting main surface is less than 5 on average, and the number of projections and depressions with a height of 2 nm or more in the square region is less than 1 on average.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: July 2, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiichiro Geshi, Shigeru Nakayama
  • Publication number: 20190131123
    Abstract: Provided is a polycrystalline ceramic substrate to be bonded to a compound semiconductor substrate with a bonding layer interposed therebetween, wherein at least one of relational expression (1) 0.7<?1/?2<0.9 and relational expression (2) 0.7<?3/?4<0.9 holds, where ?1 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 300° C. and ?2 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 300° C., and ?3 represents a linear expansion coefficient of the polycrystalline ceramic substrate at 30° C. to 1000° C. and ?4 represents a linear expansion coefficient of the compound semiconductor substrate at 30° C. to 1000° C.
    Type: Application
    Filed: April 5, 2017
    Publication date: May 2, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiichiro GESHI, Shigeru NAKAYAMA, Masashi YOSHIMURA
  • Publication number: 20180222763
    Abstract: Provided are a liquid-crystal-display protection plate that has a high strength, is produced at a reduced cost, and has a shape including a curved surface; and a method for producing the liquid-crystal-display protection plate. The liquid-crystal-display protection plate is formed of a spinel sintered body. The spinel sintered body has an average grain size of 10 ?m or more and 100 ?m or less. The liquid-crystal-display protection plate has a shape including a curved surface.
    Type: Application
    Filed: August 28, 2015
    Publication date: August 9, 2018
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiichiro GESHI, Shigeru NAKAYAMA, Masashi YOSHIMURA
  • Publication number: 20170279435
    Abstract: A ceramic substrate is formed of a polycrystalline ceramic and has a supporting main surface. The supporting main surface has a roughness of 0.01 nm or more and 3.0 nm or less in terms of Sa. The number of projections and depressions with a height of 1 nm or more in a square region with 50 ?m sides on the supporting main surface is less than 5 on average, and the number of projections and depressions with a height of 2 nm or more in the square region is less than 1 on average.
    Type: Application
    Filed: April 26, 2016
    Publication date: September 28, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiichiro GESHI, Shigeru NAKAYAMA