Patents by Inventor Keiji Fujita

Keiji Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9269540
    Abstract: An ion implantation apparatus according to an embodiment includes an ion implantation unit, a position detection unit, a charge supply unit, a current value detection unit, and a determination unit. The ion implantation unit scans the surface of a substrate with an ion beam containing positively charged ions and implants the ions into the substrate. The position detection unit detects the scan position of the ion beam on the substrate. The charge supply unit generates a plasma, emits electrons contained in the plasma, and supplies the electrons to the substrate. The current value detection unit detects a current value that changes in accordance with the amount of electrons emitted by the charge supply unit. The determination unit determines the charge build-up state of the substrate based on a change in the current value, the change being accompanied by a change in the scan position.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: February 23, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Jinguuji, Kei Hattori, Keiji Fujita, Takahito Nagamatsu
  • Publication number: 20140242732
    Abstract: An ion implantation apparatus according to an embodiment includes an ion implantation unit, a position detection unit, a charge supply unit, a current value detection unit, and a determination unit. The ion implantation unit scans the surface of a substrate with an ion beam containing positively charged ions and implants the ions into the substrate. The position detection unit detects the scan position of the ion beam on the substrate. The charge supply unit generates a plasma, emits electrons contained in the plasma, and supplies the electrons to the substrate. The current value detection unit detects a current value that changes in accordance with the amount of electrons emitted by the charge supply unit. The determination unit determines the charge build-up state of the substrate based on a change in the current value, the change being accompanied by a change in the scan position.
    Type: Application
    Filed: September 11, 2013
    Publication date: August 28, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masayuki Jinguuji, Kei Hattori, Keiji Fujita, Takahito Nagamatsu
  • Publication number: 20120202346
    Abstract: Certain embodiments provide a method for manufacturing a semiconductor device including forming first and second insulating films on first and second regions formed on a semiconductor substrate, respectively, selectively irradiating UV light to a second contact region where the second contact is to be formed in the second insulating film, forming first and second opening on the first and second insulating films by concurrently etching a first contact region in the first insulating film where the first contact is to be formed and the second contact region after having irradiated the UV light, respectively, forming first and second contacts in the first and second openings. The second insulating film differs from the first insulating film in the membrane stress, and is an insulating film with an etching rate that approaches an etching rate of the first insulating film by the UV light being irradiated.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshinobu SAKANAKA, Keiji FUJITA
  • Patent number: 7933189
    Abstract: In a focus optical system for optical discs or optical disc master exposure apparatuses, a relative positional relation between a cylindrical lens and a 4-division detector in an astigmatic optical system is adjust so that an interference fringe appearing in reflected light derived from an optical disc master is made to be incident on a dead zone of the 4-division detector. Thus, an astigmatic focus servo free from effects of variations in a focus error signal due to the interference fringe is realized. As a result of this, effects of the interference fringe appearing in the reflected light derived from an optical disc or optical disc master can be suppressed.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: April 26, 2011
    Assignee: Panasonic Corporation
    Inventors: Takeshi Omori, Takaaki Kassai, Kenji Maebara, Keiji Fujita, Hiroaki Ashiwa
  • Publication number: 20100203806
    Abstract: A semiconductor manufacturing apparatus comprising a platen holding a polishing pad; a polishing head including a pressurizing mechanism which presses a surface of a processing target substrate onto the polishing pad; and a plurality of temperature adjusters being provided in the platen in a radial direction of the platen and being capable of adjusting temperatures thereof independently from one another, wherein, when the surface of the processing target substrate is polished by rotating the platen and the polishing head, the temperatures of the temperature adjusters are changed, so that temperature adjustment can be performed selectively on a region ranging on the surface of the processing target substrate in a radial direction thereof.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 12, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomonori KITAKURA, Dai FUKUSHIMA, Keiji FUJITA
  • Publication number: 20090262634
    Abstract: In a focus optical system for optical discs or optical disc master exposure apparatuses, a relative positional relation between a cylindrical lens and a 4-division detector in an astigmatic optical system is adjust so that an interference fringe appearing in reflected light derived from an optical disc master is made to be incident on a dead zone of the 4-division detector. Thus, an astigmatic focus servo free from effects of variations in a focus error signal due to the interference fringe is realized. As a result of this, effects of the interference fringe appearing in the reflected light derived from an optical disc or optical disc master can be suppressed.
    Type: Application
    Filed: April 15, 2009
    Publication date: October 22, 2009
    Inventors: Takeshi OMORI, Takaaki KASSAI, Kenji MAEBARA, Keiji FUJITA, Hiroaki ASHIWA
  • Publication number: 20090156002
    Abstract: A wafer is placed on a lower electrode disposed in a reaction chamber; process gas is introduced into the reaction chamber; a magnetic field is applied at a position spaced from a surface of the wafer to be processed; plasma is generated by applying a high-frequency voltage between the lower electrode and an upper electrode disposed to face the lower electrode; the magnetic field is removed after the plasma is stabilized; and the wafer is plasma-processed.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 18, 2009
    Inventors: Keiji Fujita, Hisashi Kaneko
  • Patent number: 7534717
    Abstract: The formation of an interlayer insulating film above a substrate, the formation of an insulating film of an organic material on the interlayer insulating film thereafter, and the irradiation of the insulating film of an organic material and the interlayer insulating film with electron beams, thereby curing at least the insulating film of an organic material, are proposed.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: May 19, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideshi Miyajima, Keiji Fujita, Hideaki Masuda, Rempei Nakata, Miyoko Shimada
  • Patent number: 7462569
    Abstract: A method of manufacturing a semiconductor device bakes a first semiconductor substrate on which a sacrifice film is formed in a reaction chamber to preliminarily coat an inner wall of the reaction chamber with a component of a gas generated by the sacrifice film, and bakes a second semiconductor substrate on which a predetermined film including the same component as that of the sacrifice film is formed in the preliminarily coated reaction chamber, while irradiating electron beams on the predetermined film to change quality of the predetermined film.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: December 9, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keiji Fujita, Hideshi Miyajima
  • Publication number: 20080216746
    Abstract: A method of manufacturing a semiconductor device bakes a first semiconductor substrate on which a sacrifice film is formed in a reaction chamber to preliminarily coat an inner wall of the reaction chamber with a component of a gas generated by the sacrifice film, and bakes a second semiconductor substrate on which a predetermined film including the same component as that of the sacrifice film is formed in the preliminarily coated reaction chamber, while irradiating electron beams on the predetermined film to change quality of the predetermined film.
    Type: Application
    Filed: August 23, 2006
    Publication date: September 11, 2008
    Inventors: Keiji Fujita, Hideshi Miyajima
  • Patent number: 7129175
    Abstract: A semiconductor device manufacturing method comprises forming a first insulating film including silicon, carbon, nitrogen, and hydrogen above a substrate in a first chamber, carrying the substrate into a second chamber other than the first chamber, and discharging a rare gas in the second chamber, and forming a second insulating film including silicon, carbon, oxygen, and hydrogen above the first insulating film after the discharging the rare gas.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: October 31, 2006
    Assignees: Kabushiki Kaisha Toshiba, Sony, Corp.
    Inventors: Hideshi Miyajima, Kazuyuki Higashi, Keiji Fujita, Toshiaki Hasegawa, Kiyotaka Tabuchi
  • Patent number: 7094681
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a porous insulating film formed above the semiconductor substrate, the porous insulating film having a relative dielectric constant of 2.5 or less and including a first insulating material, at least a portion of pores in the porous insulating film having on the inner wall thereof a layer of a second insulating material which differs in nature from the first insulating material, and a plug and/or a wiring layer buried in the porous insulating film.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: August 22, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keiji Fujita, Rempei Nakata, Hideshi Miyajima
  • Publication number: 20050250311
    Abstract: The formation of an interlayer insulating film above a substrate, the formation of an insulating film of an organic material on the interlayer insulating film thereafter, and the irradiation of the insulating film of an organic material and the interlayer insulating film with electron beams, thereby curing at least the insulating film of an organic material, are proposed.
    Type: Application
    Filed: March 31, 2005
    Publication date: November 10, 2005
    Inventors: Hideshi Miyajima, Keiji Fujita, Hideaki Masuda, Rempei Nakata, Miyoko Shimada
  • Publication number: 20040166680
    Abstract: A semiconductor device manufacturing method comprises forming a first insulating film including silicon, carbon, nitrogen, and hydrogen above a substrate in a first chamber, carrying the substrate into a second chamber other than the first chamber, and discharging a rare gas in the second chamber, and forming a second insulating film including silicon, carbon, oxygen, and hydrogen above the first insulating film after the discharging the rare gas.
    Type: Application
    Filed: December 4, 2003
    Publication date: August 26, 2004
    Inventors: Hideshi Miyajima, Kazuyuki Higashi, Keiji Fujita, Toshiaki Hasegawa, Kiyotaka Tabuchi
  • Publication number: 20040135254
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, a porous insulating film formed above the semiconductor substrate, the porous insulating film having a relative dielectric constant of 2.5 or less and including a first insulating material, at least a portion of pores in the porous insulating film having on the inner wall thereof a layer of a second insulating material which differs in nature from the first insulating material, and a plug and/or a wiring layer buried in the porous insulating film.
    Type: Application
    Filed: November 6, 2003
    Publication date: July 15, 2004
    Inventors: Keiji Fujita, Rempei Nakata, Hideshi Miyajima
  • Patent number: 6344420
    Abstract: In a parallel-plate type plasma processing apparatus including an upper electrode having a plurality of gas introducing inlets and a support table serving as a lower electrode opposed to the upper electrode and having a silicon wafer thereon, the open ends of the inlets are expanded in their diameter directions.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: February 5, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideshi Miyajima, Keiji Fujita
  • Patent number: 6087539
    Abstract: A process for producing an ether compound represented by the general formula (II) or (III): ##STR1## wherein R.sup.1 and R.sup.2 represent each an alkyl group or a cycloalkyl group and n represents an integer of 1 to 50, which comprises bringing an acetal compound represented by the general formula (I): ##STR2## into reaction with hydrogen in the presence of a solid catalyst comprising (A) nickel in an amount corresponding to 10 to 70% by weight of metallic nickel, and (B) at least one compound selected from the group consisting of oxides of silicon, aluminum, magnesium, titanium, and zirconium; and synthetic or natural inorganic oxides containing one or more of these oxides as the constituents thereof. A vinyl ether polymer having a terminal ether group can be obtained with a good yield without causing corrosion of the apparatus used for the reaction.
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: July 11, 2000
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Hirotaka Yamasaki, Akihisa Ogawa, Shigeru Kamimori, Yoshikazu Hirao, Keiji Fujita, Tokuyuki Yoshimoto
  • Patent number: 5748288
    Abstract: The present invention provides spot-illumination of a specific size having sufficiently homogeneous light intensity distribution, with a small and inexpensive apparatus. A lighting assembly condenses the light from light source 1 with condensing-reflecting member 2. An optical integrator 3 receives at its one end the light via condensing-reflecting member 2 and emits from the other end after making the light intensity distribution homogeneous A projection lens system 4 projects the emitting surface of optical integrator 3 onto an emitted surface. By shifting the relative positioning between the lighting assembly and the substrate 11, and adjusting the distance between the substrate 11 and the mask 12, which stores a pattern to be formed, a specified area of the exposure surface 11a is scanned and exposed to have a mask pattern transcribed on the exposure surface 11a.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: May 5, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Nagano, Takashi Inoue, Hiroshi Yamashita, Takeo Sato, Keiji Fujita
  • Patent number: 5420041
    Abstract: A method of determining acid value with high accuracy, using an infrared spectrometer is provided, in which the absorbance is determined attributable to carboxylic group based on an infrared absorption spectrum at wave numbers around 3300 cm.sup.-1.
    Type: Grant
    Filed: September 23, 1993
    Date of Patent: May 30, 1995
    Assignee: Kurashiki Boseki Kabushiki Kaisha
    Inventors: Kazuhiko Matsushita, Hiroshi Yokota, Keiji Fujita, Akihiro Tsukamoto
  • Patent number: 5355814
    Abstract: The gasification burner of this invention capable of maintaining a high combustion rate for a long period of time comprises a combustion chamber having a ceiling with a small hole in its center, a pre-mixing pipe fitted into the small hole and having a nozzle at its top, wherein the pre-mixing pipe and the combustion chamber are concentric, and the spread angle of the gas flow sprayed from the end of the pre-mixing pipe is between 10 and 40 degrees, so that the relationship between the bottom of the combustion chamber and the conical gas flow is regulated by keeping a good balance between the gasification rate of the powdered coke and the life of the combustion chamber.
    Type: Grant
    Filed: January 25, 1993
    Date of Patent: October 18, 1994
    Assignee: Sumitomo Metal Mining Company Limited
    Inventors: Nobumasa Kemori, Kimiaki Utsunomiya, Hitoshi Takano, Keiji Fujita