Patents by Inventor Keiji Kimura
Keiji Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140021406Abstract: A liquid crystal compound having a high stability to heat, light and so forth, a high clearing point, a low minimum temperature of a liquid crystal phase, a small viscosity, a suitable optical anisotropy, a large dielectric anisotropy, a suitable elastic constant and an excellent solubility in other liquid crystal compounds, a liquid crystal composition containing the compound, and a liquid crystal display device including the composition. The compound is represented by formula (1): wherein, for example, R1 is fluorine or alkyl having 1 to 10 carbons; ring A1 and ring A2 are 1,4-phenylene, or 1,4-phenylene in which at least one of hydrogen is replaced by fluorine; Z1, Z2 and Z3 are a single bond; L1 and L2 are hydrogen or fluorine; X1 is fluorine or —CF3; and m is 1, and n is 0.Type: ApplicationFiled: July 10, 2013Publication date: January 23, 2014Applicants: JNC PETROCHEMICAL CORPORATION, JNC CORPORATIONInventors: Yasuyuki GOTOH, Keiji KIMURA
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Publication number: 20130335352Abstract: According to some aspects, an image display apparatus is provided comprising a display apparatus comprising a display section and a controller. The controller may be configured to display a map image via the display section, set location specification information based on an input specifying a position on the map image, and transmit the location specification information to a server apparatus, receive image data transmitted from the server apparatus in response to the transmission of location specification information to the server apparatus, the received image data having been obtained by photographing by an imaging section of an imaging apparatus configured to be worn on a head of a user, and the received image data having been transmitted to the server apparatus from the imaging apparatus in addition to additional data comprising location information detected at a time when the image data was photographed.Type: ApplicationFiled: May 28, 2013Publication date: December 19, 2013Applicant: Sony CorporationInventors: Yoichiro Sako, Keiji Kimura, Masaaki Tsuruta, Masamichi Asukai, Taiji Ito, Nozomu Ozaki, Akinobu Sugino, Hidehiko Sekizawa, Yonetaro Totsuka
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Patent number: 8473544Abstract: If a user specifies a location on a map image, he or she can see an image shot at that location. An imaging apparatus (an imaging/display apparatus 1 or an imaging apparatus 30) placed on a movable body transmits shot image data to a server apparatus together with additional data that includes location information about a photographing point, so that they are stored in the server apparatus. That is, the server apparatus accumulates pieces of image data obtained by photographing in various places by a great number of imaging apparatuses together with the location information thereof. A user of the display apparatus (the imaging/display apparatus 1 or the display apparatus 40) specifies a location on the map image.Type: GrantFiled: November 5, 2007Date of Patent: June 25, 2013Assignee: Sony CorporationInventors: Yoichiro Sako, Keiji Kimura, Masaaki Tsuruta, Masamichi Asukai, Taiji Ito, Nozomu Ozaki, Akinobu Sugino, Hidehiko Sekizawa, Yonetaro Totsuka
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Patent number: 8438359Abstract: Provided is a method for managing a memory storage region used by a processor. The processor is connected to the memory that stores data accessed while a task is being executed. The memory management method including the steps of: dividing the memory area of the memory into blocks having a plurality of different sizes; selecting a block having a size matching a size of the data accessed while the task is being executed; and storing the data accessed while the task is being executed in the selected block.Type: GrantFiled: February 27, 2008Date of Patent: May 7, 2013Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Hirofumi Nakano, Takumi Nito, Takanori Maruyama, Tsuyoshi Miura, Tomohiro Tagawa
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Patent number: 8394468Abstract: Provided is a polymerizable compound with large solubility in a liquid crystal composition and high reactivity irradiated by ultraviolet in the longer wavelength range. Provided is a liquid crystal composition that satisfies at least one of characteristics such as high maximum temperature of a nematic phase, low minimum temperature of a nematic phase, small viscosity, suitable optical anisotropy, large negative dielectric anisotropy, large specific resistance, high stability to ultraviolet light and high stability to heat, or that is suitably balanced between at least two of the characteristics.Type: GrantFiled: May 7, 2010Date of Patent: March 12, 2013Assignees: JNC Corporation, JNC Petrochemical CorporationInventors: Maiko Ito, Keiji Kimura, Norikatsu Hattori, Eriko Saegusa
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Publication number: 20120254551Abstract: It is provided a method of generating a code by a compiler, including the steps of: analyzing a program executed by a processor; analyzing data necessary to execute respective tasks included in a program; determining whether a boundary of the data used by divided tasks is consistent with a management unit of a cache memory based on results of the analyzing; and generating a code for providing a non-cacheable area from which the data to be stored in the management unit including the boundary is not temporarily stored into the cache memory and a code for storing an arithmetic processing result stored in the management unit including the boundary into a non-cacheable area in a case where it is determined that the boundary of the data used by the divided tasks is not consistent with the management unit of the cache memory.Type: ApplicationFiled: December 14, 2010Publication date: October 4, 2012Applicant: WASEDA UNIVERSITYInventors: Hironori Kasahara, Keiji Kimura, Masayoshi Mase
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Patent number: 8250548Abstract: A heterogeneous multiprocessor system including a plurality of processor elements having mutually different instruction sets and structures avoids a specific processor element from being short of resources to improve throughput. An executable task is extracted based on a preset depending relationship between a plurality of tasks, and the plurality of first processors are allocated to a general-purpose processor group based on a depending relationship among the extracted tasks. A second processor is allocated to an accelerator group, a task to be allocated is determined from the extracted tasks based on a priority value for each of tasks, and an execution cost of executing the determined task by the first processor is compared with an execution cost of executing the task by the second processor. The task is allocated to one of the general-purpose processor group and the accelerator group that is judged to be lower as a result of the cost comparison.Type: GrantFiled: January 23, 2007Date of Patent: August 21, 2012Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Jun Shirako, Yasutaka Wada, Masaki Ito, Hiroaki Shikano
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Patent number: 8200934Abstract: To reduce overhead of data transfer between processor cores and improve a processing capability of a processor, there is provided a processor including: a CPU for performing computing processing; an internal memory for storing data; and a data transfer unit for performing data transfer between the internal memory and a shared memory, in which: the data transfer unit includes: a command chain module for executing a command sequence formed of a plurality of commands including a data transfer instruction; and a monitor module for reading data set in advance in the internal memory and repeatedly monitoring the data until a comparative value and a value of the data become equal to each other, when one of the plurality of commands of the command sequence thus read is a predetermined command; and the command chain module executes a next command in the command sequence after the monitor module has finished monitoring.Type: GrantFiled: October 1, 2007Date of Patent: June 12, 2012Assignees: Hitachi, Ltd., Renesas Electronics Corporation, Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Takashi Todaka, Tatsuya Kamei, Toshihiro Hattori
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Publication number: 20120092608Abstract: Provided is a polymerizable compound with large solubility in a liquid crystal composition and high reactivity irradiated by ultraviolet in the longer wavelength range. Provided is a liquid crystal composition that satisfies at least one of characteristics such as high maximum temperature of a nematic phase, low minimum temperature of a nematic phase, small viscosity, suitable optical anisotropy, large negative dielectric anisotropy, large specific resistance, high stability to ultraviolet light and high stability to heat, or that is suitably balanced between at least two of the characteristics.Type: ApplicationFiled: May 7, 2010Publication date: April 19, 2012Applicants: JNC PETROCHEMICAL CORPORATION, JNC CORPORATIONInventors: Maiko Ito, Keiji Kimura, Norikatsu Hattori, Eriko Saegusa
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Patent number: 8108660Abstract: Each of processors has a barrier write register and a barrier read register. Each barrier write register is wired to each barrier read register by a dedicated wiring block. For example, a 1-bit barrier write register of a processor is connected, via the wiring block, to a first bit of each 8-bit barrier read register contained in the processors, and a 1-bit barrier write register of another processor is connected, via a wiring block, to a second bit of each 8-bit barrier read register contained in the processors. For example, a processor writes information to its own barrier write register, thereby notifying synchronization stand-by to the other processors and reads its own barrier read register, thereby recognizing whether the other processors are in synchronization stand-by or not. Therefore, a special dedicated instruction is not required along barrier synchronization processing, and the processing can be made at a high speed.Type: GrantFiled: January 22, 2009Date of Patent: January 31, 2012Assignees: Renesas Electronics Corporation, Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Masayuki Ito, Tatsuya Kamei, Toshihiro Hattori
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Patent number: 8051412Abstract: Performance of a heterogeneous multiprocessor is reduced as much as possible within a short time without any awareness of parallelization matched with a configuration of the heterogeneous multiprocessor. In a heterogeneous multiprocessor system, tasks having parallelism are automatically extracted by a compiler, a portion to be efficiently processed by a dedicated processor is extracted from an input program being a processing target, and processing time is estimated. Thus, by arranging the tasks according to PU characteristics, scheduling for efficiently operating a plurality of PU's in parallel is carried out.Type: GrantFiled: March 12, 2007Date of Patent: November 1, 2011Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Hiroaki Shikano
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Patent number: 8009219Abstract: Disclosed herein is an image display system including a display apparatus, an imaging apparatus placed on a movable body; and a server apparatus. The display apparatus and the imaging apparatus are capable of communicating with the server apparatus. The imaging apparatus includes: an imaging section; a speed detection section; and a control section that controls transmission of image data and speed information to the server apparatus. The server apparatus includes: a movable body speed management section that manages the moving speed of the movable body using the speed information; and a control section that identifies an imaging apparatus that matches speed specification information, and causes image data to be transferred from the identified imaging apparatus to the display apparatus. The display apparatus includes: a display section; and a control section that performs a speed specification process, an image request transmission process, and a display process.Type: GrantFiled: May 18, 2010Date of Patent: August 30, 2011Assignee: Sony CorporationInventors: Yoichiro Sako, Keiji Kimura, Masaaki Tsuruta, Masamichi Asukai, Taiji Ito, Nozomu Ozaki, Akinobu Sugino, Hidehiko Sekizawa, Yonetaro Totsuka
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Patent number: 7912267Abstract: The present invention is a virtual-slide specimen image acquisition apparatus that captures images by dividing a specimen into a plurality of sections, having a conveying device in which a plurality of specimens can be arranged and that conveys the plurality of the arranged specimens in a first direction by a distance corresponding to the length of a side along the first direction in one of the divided sections and at first time intervals and an image capturing device that has an image capturing portion for capturing images of the specimens magnified at a predetermined magnification and that scans the specimens conveyed to a predetermined position in a second direction, by a predetermined length at second time intervals, such that the image capturing portion captures images of all of the sections that are positioned identically in the first direction and that are positioned differently in the second direction perpendicular to the first direction.Type: GrantFiled: November 17, 2009Date of Patent: March 22, 2011Assignee: Olympus CorporationInventors: Yoshihiro Kawano, Mitsumori Hayashida, Keiji Kimura, Iwao Kanamori
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Patent number: 7895453Abstract: Provided is a multiprocessor system and a compiler used in the system for automatically extracting tasks having parallelism from an input program to be processed, performing scheduling to efficiently operate processor units by arranging the tasks according to characteristics of the processor units, and generating codes for optimizing a system frequency and a power supply voltage by estimating a processing amount of the processor units.Type: GrantFiled: April 12, 2006Date of Patent: February 22, 2011Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Jun Shirako, Masaki Ito, Hiroaki Shikano
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Patent number: 7876374Abstract: Disclosed herein is an image display system including a display apparatus, an imaging apparatus placed on a movable body; and a server apparatus. The display apparatus and the imaging apparatus are capable of communicating with the server apparatus. The imaging apparatus includes: an imaging section; a speed detection section; and a control section that controls transmission of image data and speed information to the server apparatus. The server apparatus includes: a movable body speed management section that manages the moving speed of the movable body using the speed information; and a control section that identifies an imaging apparatus that matches speed specification information, and causes image data to be transferred from the identified imaging apparatus to the display apparatus. The display apparatus includes: a display section; and a control section that performs a speed specification process, an image request transmission process, and a display process.Type: GrantFiled: October 29, 2007Date of Patent: January 25, 2011Assignee: Sony CorporationInventors: Yoichiro Sako, Keiji Kimura, Masaaki Tsuruta, Masamichi Asukai, Taiji Ito, Nozomu Ozaki, Akinobu Sugino, Hidehiko Sekizawa, Yonetaro Totsuka
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Patent number: 7790915Abstract: A liquid crystal (LC) compound having generally required physical properties, low viscosity, proper optical anisotropy, proper dielectric anisotropy and good compatibility with other LC compounds is described. An LC composition including the compound and an LCD device including the composition are also described. The compound is expressed by formula (1a): wherein the ring A1 and the ring A2 are independently 1,4-phenylene, pyridine-2,5-diyl, pyrimidine-2,5-diyl or naphthalene-2,6-diyl, in which any hydrogen can be replaced by halogen; Z1, Z2 and Z3 are independently a single bond, —(CH2)2—, —(CH2)4—, —CH?CH—, —C?C—, —CF2O—, —OCF2—, —COO— or —OCO—; Xa, Xb, Xc, Xd, Xe and Xf are independently hydrogen or fluorine; Y is —OCH2F, —OCHF2, —OCF3, —SCH2F, —SCHF2, —SCF3, —CH2F, —CHF2, —CF3, fluorine or chlorine; La and Lb are independently hydrogen or fluorine; and “l” and “m” are independently equal to 0 or 1.Type: GrantFiled: September 6, 2006Date of Patent: September 7, 2010Assignees: Chisso Petrochemical Corporation, Chisso CorporationInventors: Tomoyuki Kondou, Shuichi Matsui, Keiji Kimura
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Publication number: 20100220037Abstract: Disclosed herein is an image display system including a display apparatus, an imaging apparatus placed on a movable body; and a server apparatus. The display apparatus and the imaging apparatus are capable of communicating with the server apparatus. The imaging apparatus includes: an imaging section; a speed detection section; and a control section that controls transmission of image data and speed information to the server apparatus. The server apparatus includes: a movable body speed management section that manages the moving speed of the movable body using the speed information; and a control section that identifies an imaging apparatus that matches speed specification information, and causes image data to be transferred from the identified imaging apparatus to the display apparatus. The display apparatus includes: a display section; and a control section that performs a speed specification process, an image request transmission process, and a display process.Type: ApplicationFiled: May 18, 2010Publication date: September 2, 2010Applicant: Sony CorporationInventors: Yoichiro Sako, Keiji Kimura, Masaaki Tsuruta, Masamichi Asukai, Taiji Ito, Nozomu Ozaki, Akinobu Sugino, Hidehiko Sekizawa, Yonetaro Totsuka
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Publication number: 20100174876Abstract: Provided is a method for managing a memory storage region used by a processor. The processor is connected to the memory that stores data accessed while a task is being executed. The memory management method including the steps of: dividing the memory area of the memory into blocks having a plurality of different sizes; selecting a block having a size matching a size of the data accessed while the task is being executed; and storing the data accessed while the task is being executed in the selected block.Type: ApplicationFiled: February 27, 2008Publication date: July 8, 2010Applicant: WASEDA UNIVERSITYInventors: Hironori Kasahara, Keiji Kimura, Hirofumi Nakano, Takumi Nito, Takanori Maruyama, Tsuyoshi Miura, Tomohiro Tagawa
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Publication number: 20100146310Abstract: Provided is a multiprocessor system and a compiler used in the system for automatically extracting tasks having parallelism from an input program to be processed, performing scheduling to efficiently operate processor units by arranging the tasks according to characteristics of the processor units, and generating codes for optimizing a system frequency and a power supply voltage by estimating a processing amount of the processor units.Type: ApplicationFiled: January 11, 2010Publication date: June 10, 2010Inventors: Hironori Kasahara, Keiji Kimura, Jun Shirako, Masaki Ito, Hiroaki Shikano
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Publication number: 20100138331Abstract: The present invention relates to an information processing method and an electronic money system that achieve contribution to the realization of a global or social objective, such as protection of global environment, by using the characteristics of electronic money, which is money, a point, or a right of use represented by electronic data. When an electronic money card 10 is presented to an electronic money interface 27, a controller 24 detects, by using a use/use status detection unit 31, the use of the electronic money card 10 and the time and place at which the electronic money card 10 is used. In a case where the use or the like is in line with an objective such as protection of global environment or social contribution because the use is purchase or use of a commercial product or a service which meets certain conditions and for which saving of resources or energy is achieved, the controller 24 performs processing for increasing the value of electronic money.Type: ApplicationFiled: May 9, 2008Publication date: June 3, 2010Applicant: Sony CorporationInventors: Yoichiro Sako, Keiji Kimura, Takashi Fukushima, Mitsuru Takehara