Patents by Inventor Keiji Kinoshita

Keiji Kinoshita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210020751
    Abstract: In a silicon carbide semiconductor device and a silicon carbide semiconductor circuit device equipped with the silicon carbide semiconductor device, a gate leak current that flows when negative voltage with respect to the potential of a source electrode is applied to the gate electrode is limited to less than 2×10?11 A and the gate leak current is limited to less than 3.7×10?6 A/m2.
    Type: Application
    Filed: October 1, 2020
    Publication date: January 21, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Keiji OKUMURA, Akimasa KINOSHITA
  • Patent number: 10840340
    Abstract: In a MOS silicon carbide semiconductor device and a silicon carbide semiconductor circuit device equipped with the silicon carbide semiconductor device, a gate leak current that flows when negative voltage with respect to the potential of the source electrode is applied to the gate electrode is limited to less than 2×10?11 A. The negative voltage applied to the gate electrode is limited to ?3V or lower relative to the potential of the source electrode.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: November 17, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Keiji Okumura, Akimasa Kinoshita
  • Patent number: 10807173
    Abstract: A second distance is longer than a first distance and a value obtained by dividing the third distance by the fourth distance is more than or equal to 0.5 and less than or equal to 0.8 when it is assumed that the first distance represents a distance between the cutting edge and the mounting surface in a direction perpendicular to the rake face, the second distance represents a distance between the mounting surface and a boundary portion between the rising portion and the flat portion in the direction perpendicular to the rake face, the third distance represents a distance between the boundary portion and a tip of the cutting edge in a direction parallel to the rake face, and the fourth distance represents a distance between the second discharging opening portion and the tip of the cutting edge in the direction parallel to the rake face.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: October 20, 2020
    Assignee: Sumitomo Electric Hardmetal Corp.
    Inventors: Keiji Kinoshita, Kouki Matsubara, Yusuke Koike
  • Publication number: 20200309107
    Abstract: A screw member that has passed through a holder insertion hole and a resistor insertion hole being screwed into an internal threaded hole fixes a holder and a resistor to a bottom wall of a motor housing member. Thus, the resistor is attached to the motor housing member using the screw member that attaches the holder to the motor housing member. This reduces the space in the inverter accommodation chamber.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 1, 2020
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Yusuke KINOSHITA, Keiji Yashiro, Kazuhiro Shiraishi
  • Patent number: 10737937
    Abstract: A redeposited material is removed so as to electrically observe a microelement without causing foreign matters or metal contamination. An FIB device (charged particle beam device) includes an FIB barrel which discharges the focused ion beam (charged particle beam), a stage which holds a sample (substrate), a microcurrent measuring device (current measuring unit) which measures a leakage current from the sample, and a timer (time measuring unit) which measures a time to emit the focused ion beam and a time to measure the leakage current. Further, the FIB device includes a system control unit (control unit) which synchronizes a time to emit the focused ion beam and a time to measure the leakage current by the microcurrent measuring device.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: August 11, 2020
    Assignee: HITACHI, LTD.
    Inventors: Toshiyuki Mine, Keiji Watanabe, Koji Fujisaki, Masaharu Kinoshita, Masatoshi Morishita, Daisuke Ryuzaki
  • Patent number: 10677314
    Abstract: A power transmission apparatus with a centrifugal pendulum damper is realized, which can effectively suppress torque fluctuation and vibration noise of a vehicle while avoiding size increase of a centrifugal pendulum damper and deterioration of reliability of the centrifugal pendulum damper by high-speed rotation. A power transmission apparatus with a centrifugal pendulum damper includes: a centrifugal pendulum damper coupled to an input shaft through a speed-increasing mechanism configured to increase speed of rotation of the input shaft; and an engagement/disengagement mechanism capable of realizing and cutting off power transmission from the input shaft to the centrifugal pendulum damper.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: June 9, 2020
    Assignee: Mazda Motor Corporation
    Inventors: Kyosei Nakashima, Kazuhiro Tanaka, Norio Iwashita, Shinya Kamada, Hiroo Akagi, Tomokazu Kinoshita, Hiroyuki Okayama, Narihito Hongawara, Keiji Bouda
  • Publication number: 20200119147
    Abstract: A trench gate MOSFET has at an n-type current spreading region between an n?-type drift region and a p-type base region, a first p+-type region facing a bottom of a trench, and a second p+-type region disposed between adjacent trenches. The first and the second p+-type regions extend parallel to a first direction in which the trench extends and are partially connected by a p+-type connecting portion and thus, disposed in a ladder shape when viewed from the front surface of a semiconductor substrate. The second p+-type region has at a portion of a surface on a drain side, a recessed portion that is recessed toward a source side. One or more recessed portions is provided between connection sites in the second p+-type region for connection with the p+-type connecting portions that are adjacent to each other in the first direction X.
    Type: Application
    Filed: August 23, 2019
    Publication date: April 16, 2020
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Akimasa KINOSHITA, Keiji Okumura
  • Patent number: 10604823
    Abstract: A forged titanium alloy material having a duplex grain structure composed of flat grains and non-flat grains, wherein the flat grains are crystal grains of prior-? grains each having an aspect ratio of more than 3 and the non-flat grains are crystal grains of prior-? grains each having an aspect ratio of 1 to 3 inclusive. The forged titanium alloy material is characterized in that the average equivalent circle diameter of the non-flat grains is 100 ?m or less, flat grains each having a thicknesswise diameter of 20 to 500 ?m are contained in an amount of 40 to 98%, non-flat grains each having a thicknesswise diameter of 10 to 150 ?m are contained in an amount of 2 to 50%, and the flat grains each having the above-mentioned thicknesswise diameter and the non-flat grains each having the above-mentioned thicknesswise diameter are contained in the total amount of 90% or more.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: March 31, 2020
    Assignee: KOBE STEEL, LTD.
    Inventors: Yoshinori Ito, Shogo Murakami, Keiji Kinoshita
  • Patent number: 10600864
    Abstract: A semiconductor device includes: a semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type; a second semiconductor layer of a second conductivity type; a first semiconductor region of the first conductivity type; a trench; a second semiconductor region of the second conductivity type; a third semiconductor region of the second conductivity type; and a fourth semiconductor region of the first conductivity type. The second semiconductor region is selectively provided inside the first semiconductor layer, and the third semiconductor region is selectively provided inside the first semiconductor layer and contacts a bottom surface of the trench. The fourth semiconductor region is provided perpendicularly to a lengthwise direction of the trench in a plan view and is located at a depth position that is deeper than the second semiconductor region.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: March 24, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Akimasa Kinoshita, Keiji Okumura
  • Patent number: 10552515
    Abstract: To provide an information processing terminal and information processing method capable of supplying a user with information useful for selecting link information, there is provided an information processing terminal including: a request unit configured to request an information processing device to supply layout information including a plurality of pieces of link information indicating link destinations and correlated with information regarding an object based on acquisition of the information regarding the object from the object; and a display control unit configured to generate a link list image based on the layout information acquired from the information processing device and display the generated link list image on a display screen.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: February 4, 2020
    Assignee: FELICA NETWORKS, INC.
    Inventor: Keiji Kinoshita
  • Patent number: 10489491
    Abstract: To provide an information processing device and information processing method capable of presenting a plurality of pieces of link information to a user of an information processing terminal highly conveniently, there is provided an information processing device including: a link information acquisition unit configured to acquire a plurality of pieces of link information correlated with object identification information based on reception of the object identification information for identifying an object from an information processing terminal; a layout information generation unit configured to generate layout information including the plurality of pieces of acquired link information and used to generate a link list image in which information acquired from a link destination indicated by each of the plurality of pieces of link information is displayed; and a transmission control unit configured to cause the generated layout information to be transmitted to the information processing terminal.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: November 26, 2019
    Assignee: FELICA NETWORKS, INC.
    Inventor: Keiji Kinoshita
  • Publication number: 20190351493
    Abstract: A second distance is longer than a first distance and a value obtained by dividing the third distance by the fourth distance is more than or equal to 0.5 and less than or equal to 0.8 when it is assumed that the first distance represents a distance between the cutting edge and the mounting surface in a direction perpendicular to the rake face, the second distance represents a distance between the mounting surface and a boundary portion between the rising portion and the flat portion in the direction perpendicular to the rake face, the third distance represents a distance between the boundary portion and a tip of the cutting edge in a direction parallel to the rake face, and the fourth distance represents a distance between the second discharging opening portion and the tip of the cutting edge in the direction parallel to the rake face.
    Type: Application
    Filed: May 15, 2018
    Publication date: November 21, 2019
    Inventors: Keiji Kinoshita, Kouki Matsubara, Yusuke Koike
  • Publication number: 20190292046
    Abstract: A redeposited material is removed so as to electrically observe a microelement without causing foreign matters or metal contamination. An FIB device (charged particle beam device) includes an FIB barrel which discharges the focused ion beam (charged particle beam), a stage which holds a sample (substrate), a microcurrent measuring device (current measuring unit) which measures a leakage current from the sample, and a timer (time measuring unit) which measures a time to emit the focused ion beam and a time to measure the leakage current. Further, the FIB device includes a system control unit (control unit) which synchronizes a time to emit the focused ion beam and a time to measure the leakage current by the microcurrent measuring device.
    Type: Application
    Filed: November 7, 2018
    Publication date: September 26, 2019
    Applicant: HITACHI, LTD.
    Inventors: Toshiyuki MINE, Keiji WATANABE, Koji FUJISAKI, Masaharu KINOSHITA, Masatoshi MORISHITA, Daisuke RYUZAKI
  • Publication number: 20190288073
    Abstract: In a MOS silicon carbide semiconductor device and a silicon carbide semiconductor circuit device equipped with the silicon carbide semiconductor device, a gate leak current that flows when negative voltage with respect to the potential of the source electrode is applied to the gate electrode is limited to less than 2×10?11 A. The negative voltage applied to the gate electrode is limited to ?3V or lower relative to the potential of the source electrode.
    Type: Application
    Filed: January 23, 2019
    Publication date: September 19, 2019
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Keiji OKUMURA, Akimasa KINOSHITA
  • Publication number: 20190214457
    Abstract: A semiconductor device includes: a semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type; a second semiconductor layer of a second conductivity type; a first semiconductor region of the first conductivity type; a trench; a second semiconductor region of the second conductivity type; a third semiconductor region of the second conductivity type; and a fourth semiconductor region of the first conductivity type. The second semiconductor region is selectively provided inside the first semiconductor layer, and the third semiconductor region is selectively provided inside the first semiconductor layer and contacts a bottom surface of the trench. The fourth semiconductor region is provided perpendicularly to a lengthwise direction of the trench in a plan view and is located at a depth position that is deeper than the second semiconductor region.
    Type: Application
    Filed: December 6, 2018
    Publication date: July 11, 2019
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Akimasa KINOSHITA, Keiji OKUMURA
  • Patent number: 10328416
    Abstract: A fuel reforming catalyst which contains an inorganic porous support, a catalytically active species, and catalyst particles including CeO2 and ZrO2 and in which the concentration of ZrO2 in the catalyst particles is higher in the vicinity of the particle surface than in the particle interior and the concentration of CeO2 in the catalyst particles is equal in the particle interior and in the vicinity of the particle surface is proposed for the purpose of providing a new fuel reforming catalyst which can effectively lower the concentration of the hydrocarbon of C2 or more in the gas which has passed through a steam reforming reaction.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: June 25, 2019
    Assignees: Mitsui Mining & Smelting Co., Ltd., HONDA MOTOR CO., LTD.
    Inventors: Seiji Moriuchi, Kazuya Kinoshita, Yunosuke Nakahara, Keiji Tsukamoto, Kazuyuki Yamada, Hideo Urata
  • Patent number: 10300534
    Abstract: Provided is a drill having a flat-shaped drill tip and excellent in cutting edge strength and chip removability. The drill includes: a cutting edge extending in a direction at an angle ? of not less than 85° and not more than 90° with respect to a drill axis (line O-O); a flank face contiguous to the cutting edge and having a clearance angle ? of not less than 5° and not more than 10° with respect to the drill axis (line O-O); and a rake face located opposite to the flank face across the cutting edge, the cutting edge includes a recess receding in a direction parallel to the drill axis (line O-O), and the rake face includes a front clearance formed at a side of an outer periphery of the drill.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: May 28, 2019
    Assignee: SUMITOMO ELECTRIC HARDMETAL CORP.
    Inventors: Yuma Kawakami, Daisuke Murakami, Masaaki Jindai, Keiji Kinoshita
  • Publication number: 20190140091
    Abstract: An insulated-gate semiconductor device includes: an n+-type current spreading layer disposed on an n?-type drift layer; a p-type base region disposed on the current spreading layer; a n+-type main-electrode region arranged in an upper portion of the base region; an insulated-gate electrode structure provided in a trench; and a p+-type gate-bottom protection-region being in contact with a bottom of the trench, including a plurality of openings through which a part of the current spreading layer penetrates, being selectively buried in the current spreading layer, wherein positions of the openings cut on both sides of a central line of the trench are shifted from each other about the central line in a longitudinal direction of the trench in a planar pattern.
    Type: Application
    Filed: September 26, 2018
    Publication date: May 9, 2019
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Akimasa KINOSHITA, Yasuhiko OONISHI, Keiji OKUMURA
  • Publication number: 20190126366
    Abstract: A milling tool includes: a body having an outer circumferential surface formed around a central axis; a cutting insert having a rake surface, a flank surface, and a cutting edge formed by a ridgeline of the rake surface and the flank surface; and a screw attaching the cutting insert to the body. The outer circumferential surface has an insert attachment. The insert attachment portion is defined by a first seat surface continuing to the outer circumferential surface and a second seat surface continuing to the first seat surface and having a flat portion provided with a screw hole in which the screw is inserted. The cutting edge is formed of a sintered material containing at least one of cubic boron nitride and polycrystalline diamond. In a cross section perpendicular to the central axis, a first angle formed by a first direction and a second direction is an acute angle.
    Type: Application
    Filed: January 16, 2018
    Publication date: May 2, 2019
    Inventors: Keiji Kinoshita, Kouki Matsubara
  • Patent number: D879848
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: March 31, 2020
    Assignee: Sumitomo Electric Hardmetal Corp.
    Inventors: Keiji Kinoshita, Kouki Matsubara, Yusuke Koike