Patents by Inventor Keiji Mabuchi

Keiji Mabuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11095842
    Abstract: An image sensor has an array of pixel blocks, and each pixel block having associated shutter transistors with each coupled to transfer an image signal comprising a charge dependent on light exposure of a selected pixel onto an image storage capacitor of a plurality of image storage capacitors associated with the pixel block, the image storage capacitors of the pixel block configured to be read through a differential amplifier into an analog to digital converter. The differential amplifier of each pixel block receives a second input from a single reset-sampling capacitor associated with the pixel block. The single reset-sampling capacitor is loaded when the pixels of the pixel block are reset.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: August 17, 2021
    Assignee: OmniVision Technologies, Inc.
    Inventors: Keiji Mabuchi, Sohei Manabe, Lindsay Grant
  • Publication number: 20210203865
    Abstract: An image sensor includes a photodiode disposed in a semiconductor material to generate image charge in response to incident light, and a first transfer gate is coupled to the photodiode to extract image charge from the photodiode in response to a first transfer signal. A first storage gate is coupled to the first transfer gate to receive the image charge from the first transfer gate, and a first output gate is coupled to the first storage gate to receive the image charge from the first storage gate. A first capacitor is coupled to the first output gate to store the image charge.
    Type: Application
    Filed: March 17, 2021
    Publication date: July 1, 2021
    Inventors: Sohei Manabe, Keiji Mabuchi
  • Publication number: 20210183926
    Abstract: A pixel circuit includes a photodiode, a floating diffusion, and a conduction gate channel of a multi-gate transfer block disposed in a semiconductor material layer. The multi-gate transfer block is coupled to the photodiode, the floating diffusion, and an overflow capacitor. The multi-gate transfer block also includes first, second, and third gates that are disposed proximate to the single conduction gate channel region. The conduction gate channel is a single region shared among the first, second, and third gates. Overflow image charge generated in the photodiode leaks from the photodiode into the conduction gate channel to the overflow capacitor in response to the first gate, which is coupled between the photodiode and the conduction gate channel, receiving a first gate OFF signal and the second gate, which is coupled between the conduction gate channel and the overflow capacitor, receiving a second gate ON signal.
    Type: Application
    Filed: December 17, 2019
    Publication date: June 17, 2021
    Inventors: Woon Il Choi, Keiji Mabuchi
  • Publication number: 20210167103
    Abstract: A solid-state imaging device and method of making a solid-state imaging device are described herein. By way of example, the solid-state imaging device includes a first wiring layer formed on a sensor substrate and a second wiring layer formed on a circuit substrate. The sensor substrate is coupled to the circuit substrate, the first wiring layer and the second wiring layer being positioned between the sensor substrate and the circuit substrate. A first electrode is formed on a surface of the first wiring layer, and a second electrode is formed on a surface of the second wiring layer. The first electrode is in electrical contact with the second electrode.
    Type: Application
    Filed: February 12, 2021
    Publication date: June 3, 2021
    Inventors: Takeshi Yanagita, Keiji Mabuchi
  • Patent number: 10986290
    Abstract: An image sensor includes a photodiode disposed in a semiconductor material to generate image charge in response to incident light, and a first transfer gate is coupled to the photodiode to extract image charge from the photodiode in response to a first transfer signal. A first storage gate is coupled to the first transfer gate to receive the image charge from the first transfer gate, and a first output gate is coupled to the first storage gate to receive the image charge from the first storage gate. A first capacitor is coupled to the first output gate to store the image charge.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: April 20, 2021
    Assignee: OmniVision Technologies, Inc.
    Inventors: Sohei Manabe, Keiji Mabuchi
  • Patent number: 10972687
    Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: April 6, 2021
    Assignee: OmniVision Technologies, Inc.
    Inventors: Sohei Manabe, Keiji Mabuchi
  • Patent number: 10911650
    Abstract: The present technology relates to a conversion apparatus, an imaging apparatus, an electronic apparatus, and a conversion method that are capable of reducing the scale of a circuit. The conversion apparatus includes: a comparison unit that compares an input voltage of an input signal and a ramp voltage of a ramp signal that varies with time; and a storage unit that holds a code value when a comparison result from the comparison unit is inverted, the holding of the code value by the storage unit being repeated a plurality of times, to generate a digital signal having a predetermined bit number. The predetermined bit number is divided into high-order bits and low-order bits, the low-order bits are acquired earlier than the high-order bits, and the acquired low-order bits and the high-order bits are combined with each other, to generate the digital signal having the predetermined bit number. The present technology can be applied to a portion of an image sensor, in which AD conversion is performed.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: February 2, 2021
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Publication number: 20210029322
    Abstract: An image sensor has an array of pixel blocks, and each pixel block having associated shutter transistors with each coupled to transfer an image signal comprising a charge dependent on light exposure of a selected pixel onto an image storage capacitor of a plurality of image storage capacitors associated with the pixel block, the image storage capacitors of the pixel block configured to be read through a differential amplifier into an analog to digital converter. The differential amplifier of each pixel block receives a second input from a single reset-sampling capacitor associated with the pixel block. The single reset-sampling capacitor is loaded when the pixels of the pixel block are reset.
    Type: Application
    Filed: July 26, 2019
    Publication date: January 28, 2021
    Inventors: Keiji Mabuchi, Sohei Manabe, Lindsay Grant
  • Publication number: 20210028205
    Abstract: A solid-state imaging device and method of making a solid-state imaging device are described herein. By way of example, the solid-state imaging device includes a first wiring layer formed on a sensor substrate and a second wiring layer formed on a circuit substrate. The sensor substrate is coupled to the circuit substrate, the first wiring layer and the second wiring layer being positioned between the sensor substrate and the circuit substrate. A first electrode is formed on a surface of the first wiring layer, and a second electrode is formed on a surface of the second wiring layer. The first electrode is in electrical contact with the second electrode.
    Type: Application
    Filed: October 8, 2020
    Publication date: January 28, 2021
    Inventors: Takeshi Yanagita, Keiji Mabuchi
  • Publication number: 20210014440
    Abstract: An image sensor has an array of pixels, each pixel having an associated shutter transistor coupled to transfer a charge dependent on light exposure of the pixel onto an image storage capacitor, the image-storage capacitors being configured to be read into an analog to digital converter. The shutter transistors are P-type transistors in N-wells, the wells held at an analog power voltage to reduce sensitivity of pixels to dark current; in an alternative embodiment the shutter transistors are N-type transistors in P-wells, the wells held at an analog ground voltage.
    Type: Application
    Filed: July 9, 2019
    Publication date: January 14, 2021
    Inventors: Keiji Mabuchi, Sohei Manabe, Lindsay Grant
  • Patent number: 10868989
    Abstract: The present technology relates to an imaging device that can reduce the size thereof, and to an electronic apparatus. An upper substrate and a lower substrate are stacked. A pixel and a comparing unit that compares the voltage of a signal from the pixel with the ramp voltage are provided on the upper substrate, the ramp voltage varying with time. A storage unit that stores a code value obtained at a time when a comparison result from the comparing unit is inverted is provided on the lower substrate. The comparing unit is formed with a transistor that receives the voltage of the signal from the pixel at the gate, receives the ramp voltage at the source, and outputs a drain voltage. Accordingly, the imaging device can be made smaller in size. The present technology can be applied to image sensors.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: December 15, 2020
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Publication number: 20200350358
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 5, 2020
    Applicant: Sony Corporation
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Patent number: 10778918
    Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: September 15, 2020
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Publication number: 20200264309
    Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 20, 2020
    Inventors: Sohei Manabe, Keiji Mabuchi
  • Patent number: 10748958
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: August 18, 2020
    Assignee: Sony Corporation
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Patent number: 10741593
    Abstract: A pixel cell includes a photodiode disposed in a semiconductor material layer to accumulate image charge photogenerated in the photodiode in response to incident light. A storage transistor is coupled to the photodiode to store the image charge photogenerated in the photodiode. The storage transistor includes a storage gate disposed proximate a first surface of the semiconductor material layer. The storage gate includes a pair of vertical transfer gate (VTG) portions. Each one of the pair of VTG portions extends a first distance into the semiconductor material layer through the first surface of the semiconductor material layer. A storage node is disposed below the first surface of the semiconductor material layer and between the pair of VTG portions of the storage gate to store the image charge transferred from the photodiode in response to a storage signal.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: August 11, 2020
    Assignee: OmniVision Technologies, Inc.
    Inventors: Keiji Mabuchi, Sohei Manabe
  • Publication number: 20200235158
    Abstract: A sensor includes a photodiode disposed in a semiconductor material to receive light and convert the light into charge, and a first floating diffusion coupled to the photodiode to receive the charge. A second floating diffusion is coupled to the photodiode to receive the charge, and a first transfer transistor is coupled to transfer the charge from the photodiode into the first floating diffusion. A second transfer transistor is coupled to transfer the charge from the photodiode into the second floating diffusion, and an inductor is coupled between a first gate terminal of the first transfer transistor and a second gate terminal of the second transfer transistor. The inductor, the first gate terminal, and the second gate terminal form a resonant circuit.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 23, 2020
    Inventors: Xianmin Yi, Jingming Yao, Philip Cizdziel, Eric Webster, Duli Mao, Zhiqiang Lin, Jens Landgraf, Keiji Mabuchi, Kevin Johnson, Sohei Manabe, Dyson H. Tai, Lindsay Grant, Boyd Fowler
  • Patent number: 10694135
    Abstract: An imaging device includes a pixel region in which light sensing pixels are grouped into pixel-units that each include multiple pixels, each column including pixels from at least two of the pixel-units. Each of the pixel-units is connected, via a corresponding readout line, to a corresponding readout unit configured to perform analog-to-digital conversion on pixel signals output thereto. A scanning unit that extends in a column direction is configured to select pixels for readout by applying row scanning pulses to scan lines connected to rows. A scanning unit that extends in a row direction for applying readout-enabling scan pulses to lines connected to columns is omitted. Those pixels that are selected for readout by one of the row scanning pulses are read out independently of any enabling pulses applied to lines connected to columns.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: June 23, 2020
    Assignee: SONY CORPORATION
    Inventor: Keiji Mabuchi
  • Patent number: 10684373
    Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: June 16, 2020
    Assignee: OmniVision Technologies, Inc.
    Inventors: Sohei Manabe, Keiji Mabuchi
  • Patent number: 10687003
    Abstract: A pixel array for use in a high dynamic range image sensor includes a plurality of pixels arranged in a plurality of rows and columns in the pixel array. Each one of the pixels includes a linear subpixel and a log subpixel disposed in a semiconductor material. The linear subpixel is coupled to generate a linear output signal having a linear response, and the log subpixel is coupled to generate a log output signal having a logarithmic response in response to the incident light. A bitline is coupled to the linear subpixel and to the log subpixel to receive the linear output signal and the log output signal. The bitline is one of a plurality of bitlines coupled to the plurality of pixels. Each one of the plurality of bitlines is coupled to a corresponding grouping of the plurality of pixels.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: June 16, 2020
    Assignee: OmniVision Technologies, Inc.
    Inventors: Keiji Mabuchi, Dyson H. Tai, Oray Orkun Cellek, Duli Mao, Sohei Manabe