Patents by Inventor Keiji Narusawa

Keiji Narusawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8023391
    Abstract: A photodetection device is provided with a photoelectric converter portion that converts light to electric current, an electrical current/voltage converter portion, including a feedback circuit that returns at least part of the output to the input side, that converts the electrical current received from the photoelectric converter portion to a voltage corresponding to the resistance value of the feedback circuit and outputs the voltage, where the feedback circuit includes a first MOS transistor that allows the resistance value to be varied in accordance with the gate voltage.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: September 20, 2011
    Assignee: Sony Corporation
    Inventors: Takashi Sonoyama, Keiji Narusawa
  • Publication number: 20080253260
    Abstract: A photodetection device is provided with a photoelectric converter portion that converts light to electric current, an electrical current/voltage converter portion, including a feedback circuit that returns at least part of the output to the input side, that converts the electrical current received from the photoelectric converter portion to a voltage corresponding to the resistance value of the feedback circuit and outputs the voltage, where the feedback circuit includes a first MOS transistor that allows the resistance value to be varied in accordance with the gate voltage.
    Type: Application
    Filed: February 5, 2008
    Publication date: October 16, 2008
    Applicant: SONY CORPORATION
    Inventors: Takashi Sonoyama, Keiji Narusawa
  • Patent number: 6920002
    Abstract: In order to solve a problem that it takes a long time to shift from a write mode to a read mode when there is a cross talk of an output signal of a recording head to a reproducing amplifier side, there is provided a reproducing amplifier including an amplifier circuit portion having a differential pair of transistors is provided with a switching circuit comprised of switches connected with resistors, which supply a bias voltage to each base of the differential pair of transistors, respectively in parallel. The switching circuit turns on for a write mode period and for a fixed period after a change from the write mode to a read mode to decrease the input impedance of the reproducing amplifier for the periods.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: July 19, 2005
    Assignee: Sony Corporation
    Inventors: Michiya Sako, Kazue Tokuchida, Keiji Narusawa
  • Patent number: 6798601
    Abstract: First and second integrating circuits are connected to both terminals of an impact sensor, and a difference between integration outputs of the integrating circuits is obtained by a differential amplifier. Voltage waveforms result from an input offset voltage in output terminals of the first and second integrating circuits and thereby cancel each other out. In essential impact detection, a comparator compares a differential output of the differential amplifier with a threshold level, whereby impact detection is performed.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: September 28, 2004
    Assignee: Sony Corporation
    Inventors: Keiji Narusawa, Koichi Kobe
  • Patent number: 6762894
    Abstract: A head apparatus which is tough against disturbing noise and superior in the S/N ratio and which can cope with an increase of the capacity of a recording medium is disclosed. A first playback amplifier for amplifying the playback signal of a MR head and a register circuit for setting the bias current to the MR head are formed as a COS IC. The COS IC is mounted on a suspension together with the MR head. A feeble playback signal outputted from the MR head is amplified by the first playback amplifier once and then transmitted to a mother IC over a pair of signal lines. The amplified playback signal is tough against disturbing noise during transmission.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: July 13, 2004
    Assignee: Sony Corporation
    Inventors: Keiji Narusawa, Norio Shoji
  • Patent number: 6683740
    Abstract: A write amplifier circuit in a magnetic storage system has a cross coupling circuit and an active damp circuit to supply an improved write current to the head writing the data onto the media within the magnetic storage system. The inclusion of the cross coupling circuit decreases a rise time and a fall time associated with the write current. The active damp circuit reduces the undershoot and ringing of the write current. Thus, the write amplifier circuit is suitable for high speed data storage writing applications requiring minimal distortion of the data written to a magnetic medium. The write amplifier circuit achieves these improvements in the waveform of the write current by incorporating circuit elements and using both a negative feedback path and a feedforward path.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: January 27, 2004
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Soon-Gil Jung, Shang-Ching Dong, Hiroshi Takeuchi, Norio Shoji, Keiji Narusawa, Michiya Sako
  • Publication number: 20030039053
    Abstract: A first and a second integrating circuit and are connected to both terminals of an impact sensor, and a difference between integration outputs of the integrating circuits and is obtained by a differential amplifier. Voltage waveforms resulting from an input offset voltage in output terminals of the first and second integrating circuits and thereby cancel each other out. In essential impact detection, a comparator compares a differential output of the differential amplifier with a threshold level, whereby impact detection is performed.
    Type: Application
    Filed: July 1, 2002
    Publication date: February 27, 2003
    Inventors: Keiji Narusawa, Koichi Kobe
  • Publication number: 20020176191
    Abstract: In order to solve a problem that it takes a long time to shift from a write mode to a read mode when there is a cross talk of an output signal of a recording head to a reproducing amplifier side, there is provided a reproducing amplifier including an amplifier circuit portion having a differential pair of transistors is provided with a switching circuit comprised of switches connected with resistors, which supply a bias voltage to each base of the differential pair of transistors, respectively in parallel. The switching circuit turns on for a write mode period and for a fixed period after a change from the write mode to a read mode to decrease the input impedance of the reproducing amplifier for the periods.
    Type: Application
    Filed: April 10, 2002
    Publication date: November 28, 2002
    Inventors: Michiya Sako, Kazue Tokuchida, Keiji Narusawa
  • Publication number: 20020001149
    Abstract: A head apparatus is disclosed which is tough against disturbing noise and superior in the S/N ratio and can cope with an increase of the capacity of a recording medium. A first playback amplifier for amplifying a playback signal of an MR head and a register circuit for setting a bias current to the MR head are formed as a COS IC. The COS IC is mounted on a suspension together with the MR head. A feeble playback signal outputted from the MR head is amplified by the first playback amplifier once and then transmitted to a mother IC over a pair of signal lines. The amplified playback signal is tough against disturbing noise during transmission.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 3, 2002
    Applicant: Sony Corporation
    Inventors: Keiji Narusawa, Norio Shoji
  • Patent number: 6154333
    Abstract: An amplification circuit for an MR head which can realize a reduction of the power consumption, simplification of the circuit configuration by providing capacitors inside the circuit, and reduction of the number of externally provided parts, wherein a current is supplied to an MR head resistor from a bias current source and the amount of change of the head resistance is converted to a voltage change when reproducing magnetically recorded data. A direct current component of the voltage dropped in the head resistor is cut by capacitors, and only the alternating current component is input to a differential amplification circuit configured by transistors. Recorded data can be distinguished in accordance with an amplified output voltage, so capacitances of direct current cut-off capacitors can be set small and thus the direct current cut-off capacitors can be provided in the IC chip and the number of external parts can be reduced.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: November 28, 2000
    Assignee: Sony Corporation
    Inventors: Keiji Narusawa, Norio Shoji
  • Patent number: 5818211
    Abstract: A current generating circuit which has a current source, two switches connected in serial between one of the output terminals and a first or second transistor, and a control signal generating circuit that generates a control signal for operating the first and second transistors out of phase. A write current is generated between the output terminals by direct switching of a current supplied to the first and second transistors by the two switches. The dynamic range of the output voltage for a magnetic head in a recording apparatus connected to the output terminals can be made large, and the rising and falling times of the write current can be shortened to result in an improved high speed recording.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: October 6, 1998
    Assignee: Sony Corporation
    Inventors: Keiji Narusawa, Michiya Sako