Patents by Inventor Keiji Osada

Keiji Osada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11302550
    Abstract: In a transfer method used in a substrate processing apparatus including a vacuum transfer chamber and a first and a second processing chamber and a preliminary chamber connected to the vacuum transfer chamber, a first and a second processing chamber are heated such that a temperature of the first processing chamber becomes lower than a temperature of the second processing chamber. A processed substrate is transferred from the first processing chamber to the second processing chamber and an unprocessed substrate is transferred from the preliminary chamber to the first processing chamber using a substrate transfer device disposed in the vacuum transfer chamber. Further, the transfer of the processed substrate and the transfer of the unprocessed substrate are repeatedly executed for each of substrates, and the transfer of the unprocessed substrate is executed when no substrate is mounted in the first processing chamber.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: April 12, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yohei Kawamura, Keiji Osada
  • Publication number: 20200105564
    Abstract: In a transfer method used in a substrate processing apparatus including a vacuum transfer chamber and a first and a second processing chamber and a preliminary chamber connected to the vacuum transfer chamber, a first and a second processing chamber are heated such that a temperature of the first processing chamber becomes lower than a temperature of the second processing chamber. A processed substrate is transferred from the first processing chamber to the second processing chamber and an unprocessed substrate is transferred from the preliminary chamber to the first processing chamber using a substrate transfer device disposed in the vacuum transfer chamber. Further, the transfer of the processed substrate and the transfer of the unprocessed substrate are repeatedly executed for each of substrates, and the transfer of the unprocessed substrate is executed when no substrate is mounted in the first processing chamber.
    Type: Application
    Filed: September 24, 2019
    Publication date: April 2, 2020
    Inventors: Yohei KAWAMURA, Keiji OSADA
  • Patent number: 10186422
    Abstract: A substrate processing apparatus is provided with a process module including a processing container, a rotary table installed within the processing container, the rotary table having a plurality of placing regions to receive substrates, and a process gas supply unit supplying a process gas to the placing regions, a load port in which a transfer container is placed, a dummy substrate receiving unit, a transfer chamber including a transfer mechanism delivering the product substrates or the dummy substrates between the transfer container or the dummy substrate receiving unit and the rotary table, a setting unit setting a placing region to which one of the product substrates is to be transferred, and a control unit outputting a control signal such that the dummy substrates are carried into the remaining placing regions.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: January 22, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Naohide Ito, Keiji Osada, Daisuke Morisawa
  • Patent number: 9828675
    Abstract: Disclosed is a processing apparatus. The processing apparatus includes: a load port in which a conveyance container accommodating a plurality of semiconductor wafers is placed; a dummy wafer storage area in which a conveyance container accommodating a plurality of dummy wafers is placed; a normal-pressure conveyance room in which a first conveyance arm is installed; an equipment that processes the plurality of semiconductor wafers in a state where the semiconductor wafers and the dummy wafers which are conveyed are placed in slots, respectively; and a controller that controls each component of the processing apparatus. The controller classifies the dummy wafers accommodated in the conveyance container into a plurality of groups, and controls the first conveyance arm to preferentially convey the dummy wafers within one of the classified groups to the equipment and, in replacing the dummy wafers, to perform replacement of the dummy wafers group to group as classified.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: November 28, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Naohide Ito, Daisuke Morisawa, Keiji Osada
  • Patent number: 9766617
    Abstract: The substrate processing apparatus includes: a plurality of processing modules; a transfer mechanism; a controller; and a setting unit. The processing module processes with respect to the substrate. The transfer mechanism transfers the substrate ejected from the transfer container. The controller outputs control signals for transferring the substrate to the plurality of processing modules along a previously set transfer path through the transfer mechanism sequentially, and for processing with respect to the substrate in the processing module of a transfer destination based on a processing recipe in which a processing order and a processing condition are set. The setting unit sets a content of a non-recipe operation except for operations set in the processing recipe and a performing timing for performing the non-recipe operation by a control operation of the controller every processing module. The non-recipe operation is performed with respect to the processing modules.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: September 19, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Junichi Ogawa, Youichi Nakayama, Keiji Osada, Hiroaki Dewa
  • Publication number: 20160307784
    Abstract: A substrate processing system includes a processing unit having one or more processing chambers each of which includes a mounting table configured to mount thereon a substrate and is configured to perform predetermined processing on the substrate, a loading/unloading unit configured to load/unload a substrate container accommodating a plurality of substrates, one or more transfer units configured to transfer a substrate between the loading/unloading unit and the processing chambers, and a control unit configured to control the processing unit, the loading/unloading unit and the transfer units. The control unit controls a simulated operation, which does not include the predetermined processing in the processing chamber, to be performed on a plurality of dummy substrates in parallel. The simulated operation is a simulated transfer operation of the dummy substrates and includes a operation without transferring the dummy substrates from the loading/unloading unit into the processing chamber.
    Type: Application
    Filed: April 19, 2016
    Publication date: October 20, 2016
    Inventors: Satoshi GOMI, Daisuke MORISAWA, Keiji OSADA
  • Patent number: 9318363
    Abstract: In STEP 1, a mapping operation is carried out by a mapping device. In STEP 2, based on position information for the wafer (W) detected by the mapping operation, it is determined whether or not a wafer (W) position is in an abnormal state or not. When the wafer position is determined to be in the abnormal state (Yes), a closing/opening operation, in which a FOUP door (19c) is temporarily closed and then opened, is carried out in STEP 3. In STEP 4, the number of times the FOUP door (19c) is closed/opened (in other words, the number of times a port door (62) is closed/opened) is counted, and in STEP 5, it is determined whether or not this count value is less than a preset value. If the count value is less than the preset value (Yes), the processing in STEP 1-STEP 5 is repeated once again.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: April 19, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kozo Kai, Takamasa Chikuma, Keiji Osada, Chunmui Li
  • Publication number: 20160093520
    Abstract: Disclosed is a processing apparatus. The processing apparatus includes: a load port in which a conveyance container accommodating a plurality of semiconductor wafers is placed; a dummy wafer storage area in which a conveyance container accommodating a plurality of dummy wafers is placed; a normal-pressure conveyance room in which a first conveyance arm is installed; an equipment that processes the plurality of semiconductor wafers in a state where the semiconductor wafers and the dummy wafers which are conveyed are placed in slots, respectively; and a controller that controls each component of the processing apparatus. The controller classifies the dummy wafers accommodated in the conveyance container into a plurality of groups, and controls the first conveyance arm to preferentially convey the dummy wafers within one of the classified groups to the equipment and, in replacing the dummy wafers, to perform replacement of the dummy wafers group to group as classified.
    Type: Application
    Filed: September 21, 2015
    Publication date: March 31, 2016
    Inventors: Naohide ITO, Daisuke MORISAWA, Keiji OSADA
  • Publication number: 20150005928
    Abstract: In STEP 1, a mapping operation is carried out by a mapping device. In STEP 2, based on position information for the wafer (W) detected by the mapping operation, it is determined whether or not a wafer (W) position is in an abnormal state or not. When the wafer position is determined to be in the abnormal state (Yes), a closing/opening operation, in which a FOUP door (19c) is temporarily closed and then opened, is carried out in STEP 3. In STEP 4, the number of times the FOUP door (19c) is closed/opened (in other words, the number of times a port door (62) is closed/opened) is counted, and in STEP 5, it is determined whether or not this count value is less than a preset value. If the count value is less than the preset value (Yes), the processing in STEP 1-STEP 5 is repeated once again.
    Type: Application
    Filed: January 8, 2013
    Publication date: January 1, 2015
    Inventors: Kozo Kai, Takamasa Chikuma, Keiji Osada, Chunmui Li
  • Patent number: 8854035
    Abstract: A magnetic type rotation detection device may include a magnet body formed with a magnetic pole pair comprised of an “S”-pole and an “N”-pole and provided on a rotation body, a magnetic sensing element facing the magnet body in a rotation center axial line direction of the rotation body, a partition member disposed between the magnet body and the magnetic sensing element, and a ring fixed to a face of the partition member on a side where the magnet body is located. A center of the magnetic sensing element may be located on a center axial line of the ring. The magnet body may be disposed on an inner side of the ring in a non-contact state with the ring. A center of the magnet body may be located on the center axial line of the ring.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: October 7, 2014
    Assignee: Nidec Sankyo Corporation
    Inventors: Haruhiro Tsuneta, Keiji Osada, Syungo Yasaki, Tomomi Akahane
  • Publication number: 20140121814
    Abstract: The substrate processing apparatus includes: a plurality of processing modules; a transfer mechanism; a controller; and a setting unit. The processing module processes with respect to the substrate. The transfer mechanism transfers the substrate ejected from the transfer container. The controller outputs control signals for transferring the substrate to the plurality of processing modules along a previously set transfer path through the transfer mechanism sequentially, and for processing with respect to the substrate in the processing module of a transfer destination based on a processing recipe in which a processing order and a processing condition are set. The setting unit sets a content of a non-recipe operation except for operations set in the processing recipe and a performing timing for performing the non-recipe operation by a control operation of the controller every processing module. The non-recipe operation is performed with respect to the processing modules.
    Type: Application
    Filed: October 25, 2013
    Publication date: May 1, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Junichi OGAWA, Youichi NAKAYAMA, Keiji OSADA, Hiroaki DEWA
  • Publication number: 20140109833
    Abstract: A substrate processing apparatus is provided with a process module including a processing container, a rotary table installed within the processing container, the rotary table having a plurality of placing regions to receive substrates, and a process gas supply unit supplying a process gas to the placing regions, a load port in which a transfer container is placed, a dummy substrate receiving unit, a transfer chamber including a transfer mechanism delivering the product substrates or the dummy substrates between the transfer container or the dummy substrate receiving unit and the rotary table, a setting unit setting a placing region to which one of the product substrates is to be transferred, and a control unit outputting a control signal such that the dummy substrates are carried into the remaining placing regions.
    Type: Application
    Filed: October 22, 2013
    Publication date: April 24, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Naohide ITO, Keiji OSADA, Daisuke MORISAWA
  • Patent number: 8571703
    Abstract: A processing system includes process modules, load lock modules, an equipment controller, and a machine controller. The equipment controller controls transfer and processing of wafers in the processing system. A transfer destination determining portion determines the transfer destination of each wafer such that each wafer is sequentially transferred to a normally operating process module. When an abnormality occurs in a process module, an evacuation portion temporarily evacuates to a cassette stage the wafer determined to be transferred to the abnormal process module and that has not yet been transferred to the abnormal process module. When an error of the abnormal process module is dealt with, a transfer destination change portion changes the transfer destination of a wafer scheduled to be first transferred from the cassette case, to the transfer inhibition-released process module. When the error of the transfer-inhibited processing chamber is released, the transfer route is optimized.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: October 29, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masahiro Numakura, Keiji Osada
  • Publication number: 20110227563
    Abstract: A magnetic type rotation detection device may include a magnet body formed with a magnetic pole pair comprised of an “S”-pole and an “N”-pole and provided on a rotation body, a magnetic sensing element facing the magnet body in a rotation center axial line direction of the rotation body, a partition member disposed between the magnet body and the magnetic sensing element, and a ring fixed to a face of the partition member on a side where the magnet body is located. A center of the magnetic sensing element may be located on a center axial line of the ring. The magnet body may be disposed on an inner side of the ring in a non-contact state with the ring. A center of the magnet body may be located on the center axial line of the ring.
    Type: Application
    Filed: September 2, 2009
    Publication date: September 22, 2011
    Applicant: NIDEC SANKYO CORPORATION
    Inventors: Takehiko Akahane, Tomomi Akahane, Haruhiro Tsuneta, Keiji Osada, Syungo Yasaki
  • Patent number: 7672502
    Abstract: Noise reduction processing for detecting the circumferential edge of a wafer W placed on a rotary stage with a light-transmitting sensor, obtaining detection values provided by the light-transmitting sensor as substrate edge shape data, detecting sudden abnormal data in the substrate edge shape data, eliminating the detected sudden abnormal data and interpolating the substrate edge shape data with estimated data generated based upon surrounding data in place of the abnormal data, notch mark judgment processing for detecting a notch mark candidate in the substrate edge shape data having undergone the noise reduction processing and making a decision as to whether or not the sets of data corresponding to the notch mark candidate area satisfies a predetermined judgment condition, and substrate positioning processing for positioning the substrate based upon a notch mark that satisfies the predetermined judgment conditions are executed.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: March 2, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Keiji Osada, Yasuhiko Nishinakayama, Gaku Ikeda, Hiroyuki Takahashi
  • Publication number: 20090259335
    Abstract: When a wafer (W101) to be returned from a second cluster (12) to a first cluster (10) is delivered to a pass area (PA), a vacuum transfer robot (RB1) in the first cluster (10) performs serial transportation in the first cluster (10) preferentially while keeping the wafer (W101) at the pass area (PA). Subsequently, the vacuum transfer robot (RB1), holding a wafer (W104) to be sent from the first cluster (10) to the second cluster (12) by one arm thereof, receives the wafer (W101) existing in the pass area (PA) by the other arm thereof and delivers the wafer (W104) to the pass area (PA) instead, through pick and place operation. According to the procedure, throughput of continuous processing employing a plurality of process modules of two clusters (multi-chamber apparatuses) (10, 12) is improves as much as possible.
    Type: Application
    Filed: November 28, 2006
    Publication date: October 15, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Gaku Ikeda, Keiji Osada, Kunio Takano
  • Publication number: 20090076648
    Abstract: A processing system includes process modules, load lock modules, an equipment controller, and a machine controller. The equipment controller controls transfer and processing of wafers in the processing system. A transfer destination determining portion determines the transfer destination of each wafer such that each wafer is sequentially transferred to a normally operating process module. When an abnormality occurs in a process module, an evacuation portion temporarily evacuates to a cassette stage the wafer determined to be transferred to the abnormal process module and that has not yet been transferred to the abnormal process module. When an error of the abnormal process module is dealt with, a transfer destination change portion changes the transfer destination of a wafer scheduled to be first transferred from the cassette case, to the transfer inhibition-released process module. When the error of the transfer-inhibited processing chamber is released, the transfer route is optimized.
    Type: Application
    Filed: September 3, 2008
    Publication date: March 19, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masahiro NUMAKURA, Keiji Osada
  • Publication number: 20060222236
    Abstract: Noise reduction processing for detecting the circumferential edge of a wafer W placed on a rotary stage with a light-transmitting sensor, obtaining detection values provided by the light-transmitting sensor as substrate edge shape data, detecting sudden abnormal data in the substrate edge shape data, eliminating the detected sudden abnormal data and interpolating the substrate edge shape data with estimated data generated based upon surrounding data in place of the abnormal data, notch mark judgment processing for detecting a notch mark candidate in the substrate edge shape data having undergone the noise reduction processing and making a decision as to whether or not the sets of data corresponding to the notch mark candidate area satisfies a predetermined judgment condition, and substrate positioning processing for positioning the substrate based upon a notch mark that satisfies the predetermined judgment conditions are executed.
    Type: Application
    Filed: March 21, 2006
    Publication date: October 5, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Keiji Osada, Yasuhiko Nishinakayama, Gaku Ikeda, Hiroyuki Takahashi
  • Patent number: 5432589
    Abstract: An original film holder includes an elongated main body having a plurality of pins for engaging a plurality of punch holes formed in a side portion of an original film; a push-up plate for pushing up the side portion of the original film from the main body to disengage the original film from the pins, the push-up plate being located on the main body and having holes through which the pins are inserted; a pressing member located above the main body and the push-up plate to clamp the original film in cooperation with the push-up plate; a push-up plate moving unit for moving the push-up plate upwardly from the main body to disengage the original film from the pins; a pressing member moving unit for moving the pressing member downwardly to press the original film on the push-up plate; and a retreating unit for retreating the pressing member from a position above the main body.
    Type: Grant
    Filed: April 6, 1993
    Date of Patent: July 11, 1995
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Hiroki Sutoh, Shinichi Yabe, Hiroshi Kawaguchi, Keiji Osada
  • Patent number: 5327194
    Abstract: A lithographic printing plate printer includes: an original-film loading section; a lithographic printing plate loading section; a printing surface plate on which an original film is brought into close contact with a lithographic printing plate; a light source for printing an image on the original film onto the lithographic printing plate on the printing surface plate; a punch-hole punching unit for punching a punch hole in the original film; an original film transporting unit for taking out the original film in the original-film loading section and transporting it onto the printing surface plate via the punch-hole punching means; and a lithographic printing plate transporting unit for taking out the lithographic printing plate in the lithographic printing plate loading section and transporting it onto the printing surface plate.
    Type: Grant
    Filed: April 1, 1993
    Date of Patent: July 5, 1994
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Yoshiyuki Doi, Keiji Osada, Toshimitsu Ishiwata, Kazuya Fujimoto, Shinichi Yabe, Hiroshi Kawaguchi