Patents by Inventor Keiji Sasano

Keiji Sasano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240234464
    Abstract: An imaging device of an embodiment of the present disclosure includes: a pixel array part in which a plurality of pixels is disposed in a row direction and a column direction; a photoelectric conversion layer including a compound semiconductor; and an optical member in which a first refractive index portion and a second refractive index portion having mutually different refractive indices are disposed alternately from a central part to an outer peripheral part. The optical member is disposed on side of a light entering surface of the photoelectric conversion layer to straddle the plurality of pixels adjacent at least in the row direction or the column direction.
    Type: Application
    Filed: March 31, 2021
    Publication date: July 11, 2024
    Inventor: Keiji Sasano
  • Publication number: 20240136381
    Abstract: An imaging device of an embodiment of the present disclosure includes: a pixel array part in which a plurality of pixels is disposed in a row direction and a column direction; a photoelectric conversion layer including a compound semiconductor; and an optical member in which a first refractive index portion and a second refractive index portion having mutually different refractive indices are disposed alternately from a central part to an outer peripheral part. The optical member is disposed on side of a light entering surface of the photoelectric conversion layer to straddle the plurality of pixels adjacent at least in the row direction or the column direction.
    Type: Application
    Filed: March 30, 2021
    Publication date: April 25, 2024
    Inventor: Keiji Sasano
  • Patent number: 9305958
    Abstract: A solid-state image sensing apparatus includes a solid-state image sensing device, signal processing circuit device, and a multi-layer wiring package. The solid-state image sensing device has a pixel in an image sensing area thereof. The pixel receives incident light and generate a signal electric charge. The signal processing circuit device is arranged to face the image sensing area and applies signal processing to a signal output from the solid-state image sensing device. The multi-layer wiring package has wiring layers, the solid-state image sensing device, and the signal processing circuit device. Each of the wiring layers is laminated via an insulator. The multi-layer wiring package is formed such that a first wiring layer provided between the solid-state image sensing device and the signal processing circuit device has a greater thickness than second wiring layers and has heat conductivity higher than or equal to heat conductivity of the second wiring layers.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: April 5, 2016
    Assignee: SONY CORPORATION
    Inventors: Hiroki Hagiwara, Keiji Sasano, Hiroaki Tanaka, Yuki Tuji, Tsuyoshi Watanabe, Koji Tsuchiya, Kenzo Tanaka, Takaya Wada, Noboru Kawabata, Hirokazu Yoshida, Hironori Yokoyama
  • Patent number: 9070610
    Abstract: A solid-state imaging device includes an image sensor chip and a signal processing chip, which are electrically connected. A low thermal conductivity region is positioned between the image sensor chip and the signal processing chip. The low thermal conductivity region is configured to insulate the image sensor chip from heat, which may be generated by the signal processing chip.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: June 30, 2015
    Assignee: SONY CORPORATION
    Inventors: Keiji Sasano, Hiroaki Tanaka, Hiroki Hagiwara, Yuki Tsuji, Tsuyoshi Watanabe, Koji Tsuchiya, Kenzo Tanaka, Takaya Wada, Hirokazu Yoshida, Noboru Kawabata, Hironori Yokoyama
  • Publication number: 20150123234
    Abstract: A solid-state image sensing apparatus includes a solid-state image sensing device, signal processing circuit device, and a multi-layer wiring package. The solid-state image sensing device has a pixel in an image sensing area thereof. The pixel receives incident light and generate a signal electric charge. The signal processing circuit device is arranged to face the image sensing area and applies signal processing to a signal output from the solid-state image sensing device. The multi-layer wiring package has wiring layers, the solid-state image sensing device, and the signal processing circuit device. Each of the wiring layers is laminated via an insulator. The multi-layer wiring package is formed such that a first wiring layer provided between the solid-state image sensing device and the signal processing circuit device has a greater thickness than second wiring layers and has heat conductivity higher than or equal to heat conductivity of the second wiring layers.
    Type: Application
    Filed: January 15, 2015
    Publication date: May 7, 2015
    Applicant: SONY CORPORATION
    Inventors: Hiroki HAGIWARA, Keiji SASANO, Hiroaki TANAKA, Yuki TUJI, Tsuyoshi WATANABE, Koji TSUCHIYA, Kenzo TANAKA, Takaya WADA, Noboru KAWABATA, Hirokazu YOSHIDA, Hironori YOKOYAMA
  • Patent number: 8947593
    Abstract: A solid-state image sensing apparatus includes a solid-state image sensing device, signal processing circuit device, and a multi-layer wiring package. The solid-state image sensing device has a pixel in an image sensing area thereof. The pixel receives incident light and generate a signal electric charge. The signal processing circuit device is arranged to face the image sensing area and applies signal processing to a signal output from the solid-state image sensing device. The multi-layer wiring package has wiring layers, the solid-state image sensing device, and the signal processing circuit device. Each of the wiring layers is laminated via an insulator. The multi-layer wiring package is formed such that a first wiring layer provided between the solid-state image sensing device and the signal processing circuit device has a greater thickness than second wiring layers and has heat conductivity higher than or equal to heat conductivity of the second wiring layers.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Hiroki Hagiwara, Keiji Sasano, Hiroaki Tanaka, Yuki Tuji, Tsuyoshi Watanabe, Koji Tsuchiya, Kenzo Tanaka, Takaya Wada, Noboru Kawabata, Hirokazu Yoshida, Hironori Yokoyama
  • Publication number: 20140218573
    Abstract: A solid-state image sensing apparatus includes a solid-state image sensing device, signal processing circuit device, and a multi-layer wiring package. The solid-state image sensing device has a pixel in an image sensing area thereof. The pixel receives incident light and generate a signal electric charge. The signal processing circuit device is arranged to face the image sensing area and applies signal processing to a signal output from the solid-state image sensing device. The multi-layer wiring package has wiring layers, the solid-state image sensing device, and the signal processing circuit device. Each of the wiring layers is laminated via an insulator. The multi-layer wiring package is formed such that a first wiring layer provided between the solid-state image sensing device and the signal processing circuit device has a greater thickness than second wiring layers and has heat conductivity higher than or equal to heat conductivity of the second wiring layers.
    Type: Application
    Filed: April 3, 2014
    Publication date: August 7, 2014
    Applicant: SONY CORPORATION
    Inventors: Hiroki HAGIWARA, Keiji Sasano, Hiroaki Tanaka, Yuki Tuji, Tsuyoshi Watanabe, Koji Tsuchiya, Kenzo Tanaka, Takaya Wada, Noboru Kawabata, Hirokazu Yoshida, Hironori Yokoyama
  • Patent number: 8711280
    Abstract: A solid-state image sensing apparatus includes a solid-state image sensing device, signal processing circuit device, and a multi-layer wiring package. The solid-state image sensing device has a pixel in an image sensing area thereof. The pixel receives incident light and generate a signal electric charge. The signal processing circuit device is arranged to face the image sensing area and applies signal processing to a signal output from the solid-state image sensing device. The multi-layer wiring package has wiring layers, the solid-state image sensing device, and the signal processing circuit device. Each of the wiring layers is laminated via an insulator. The multi-layer wiring package is formed such that a first wiring layer provided between the solid-state image sensing device and the signal processing circuit device has a greater thickness than second wiring layers and has heat conductivity higher than or equal to heat conductivity of the second wiring layers.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: April 29, 2014
    Assignee: Sony Corporation
    Inventors: Hiroki Hagiwara, Keiji Sasano, Hiroaki Tanaka, Yuki Tuji, Tsuyoshi Watanabe, Koji Tsuchiya, Kenzo Tanaka, Takaya Wada, Noboru Kawabata, Hirokazu Yoshida, Hironori Yokoyama
  • Publication number: 20130010145
    Abstract: A solid-state image sensing apparatus includes a solid-state image sensing device, signal processing circuit device, and a multi-layer wiring package. The solid-state image sensing device has a pixel in an image sensing area thereof. The pixel receives incident light and generate a signal electric charge. The signal processing circuit device is arranged to face the image sensing area and applies signal processing to a signal output from the solid-state image sensing device. The multi-layer wiring package has wiring layers, the solid-state image sensing device, and the signal processing circuit device. Each of the wiring layers is laminated via an insulator. The multi-layer wiring package is formed such that a first wiring layer provided between the solid-state image sensing device and the signal processing circuit device has a greater thickness than second wiring layers and has heat conductivity higher than or equal to heat conductivity of the second wiring layers.
    Type: Application
    Filed: June 22, 2012
    Publication date: January 10, 2013
    Applicant: Sony Corporation
    Inventors: Hiroki Hagiwara, Keiji Sasano, Hiroaki Tanaka, Yuki Tuji, Tsuyoshi Watanabe, Koji Tsuchiya, Kenzo Tanaka, Takaya Wada, Noboru Kawabata, Hirokazu Yoshida, Hironori Yokoyama
  • Publication number: 20120008025
    Abstract: A solid-state imaging device includes an image sensor chip and a signal processing chip, which are electrically connected. A low thermal conductivity region is positioned between the image sensor chip and the signal processing chip. The low thermal conductivity region is configured to insulate the image sensor chip from heat, which may be generated by the signal processing chip.
    Type: Application
    Filed: June 16, 2011
    Publication date: January 12, 2012
    Applicant: SONY CORPORATION
    Inventors: Keiji Sasano, Hiroaki Tanaka, Hiroki Hagiwara, Yuki Tsuji, Tsuyoshi Watanabe, Koji Tsuchiya, Kenzo Tanaka, Takaya Wada, Hirokazu Yoshida, Noboru Kawabata, Hironori Yokoyama
  • Patent number: 6531334
    Abstract: A hollow package includes a package body composed of an epoxy resin having a low thermal coefficient of linear expansion, wherein the package body includes a recess for receiving an electronic component, and leads, for extracting electrodes of the electronic component, extending from the inner surface of the recess, via the upper surface of the package body, to the peripheral surface, and a transparent sealing plate bonded onto the upper surface of the package body with an ultraviolet-curable resin.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: March 11, 2003
    Assignee: Sony Corporation
    Inventor: Keiji Sasano
  • Publication number: 20020024131
    Abstract: A hollow package includes a package body composed of an epoxy resin having a low thermal coefficient of linear expansion, wherein the package body includes a recess for receiving an electronic component, and leads, for extracting electrodes of the electronic component, extending from the inner surface of the recess, via the upper surface of the package body, to the peripheral surface, and a transparent sealing plate bonded onto the upper surface of the package body with an ultraviolet-curable resin.
    Type: Application
    Filed: November 2, 2001
    Publication date: February 28, 2002
    Inventor: Keiji Sasano
  • Patent number: 6313525
    Abstract: A hollow package includes a package body composed of an epoxy resin having a low thermal coefficient of linear expansion, wherein the package body includes a recess for receiving an electronic component, and leads, for extracting electrodes of the electronic component, extending from the inner surface of the recess, via the upper surface of the package body, to the peripheral surface, and a transparent sealing plate bonded onto the upper surface of the package body with an ultraviolet-curable resin.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: November 6, 2001
    Assignee: Sony Corporation
    Inventor: Keiji Sasano