Patents by Inventor Keiji Tanabe
Keiji Tanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240162760Abstract: An electric-power conversion device receives an electromagnetic wave transmitted from space and converts the electromagnetic wave into electric power. The electric-power conversion device includes: an electric-power conversion portion for receiving an electromagnetic wave transmitted from space and converting the electromagnetic wave into electric power; a propelling device or driving device for moving the electric-power conversion device; a positioning device for determining the position of the electric-power conversion device; a control device for controlling the propelling device or the driving device based on information about the position and the electric power received by the electric-power conversion portion; and an electric-power supply device for supplying the electric power received by the electric-power conversion portion to an electric system.Type: ApplicationFiled: November 13, 2023Publication date: May 16, 2024Inventors: Makoto ITO, Koichi WATANABE, Tsukasa FUNANE, Yosuke TANABE, Hisatoshi KIMURA, Keiji WATANABE
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Patent number: 8397597Abstract: A rack bar and a method for production thereof. The rack bar is composed of a steel pipe (10) and an embedded metal core (14) placed therein. The steel pipe has rack teeth formed thereon by forging. The embedded metal core (14) is made of a metal softer than the steel pipe (10) and has its surface wave-shaped such that the bottom (20) is wide and the top (22) is narrow.Type: GrantFiled: June 24, 2011Date of Patent: March 19, 2013Assignee: Kondo Seiko Co., Ltd.Inventor: Keiji Tanabe
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Publication number: 20120258329Abstract: Disclosed herein are a rack bar and a method for production thereof. The rack bar is composed of a steel pipe (10) and an embedded metal core (14) placed therein. The steel pipe has rack teeth formed thereon by forging. The embedded metal core (14) is made of a metal softer than the steel pipe (10) and has its surface wave-shaped such that the bottom (20) is wide and the top (22) is narrow.Type: ApplicationFiled: June 24, 2011Publication date: October 11, 2012Applicant: KONDO SEIKO CO., LTD.Inventor: Keiji TANABE
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Patent number: 7677073Abstract: A method of manufacturing a part with a tooth profile by cold forging includes an initial step of forming a initial tooth profile and a finishing step of forming a completed tooth profile by sizing. Between the initial step and the finishing step, is an intermediate step tooth thickness of the initial tooth profile is either maintained or reduced by 10% or less from the tooth thickness of the initial tooth profile. In the intermediate step an addendum part is expanded beyond the initial tooth profile by cold forging.Type: GrantFiled: October 15, 2004Date of Patent: March 16, 2010Assignee: Kondo Seiko Co., Ltd.Inventor: Keiji Tanabe
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Publication number: 20070204669Abstract: A method of manufacturing a tooth profile part by cold forging comprising: an initial step of forming a initial tooth profile: a completing step of forming a completed tooth profile by sizing: between the initial step and the completing step, maintaining a tooth thickness of the initial tooth profile identical to a tooth thickness of the initial tooth profile or reducing a tooth thickness within a range of 10% or less compared to a tooth thickness of the initial tooth profile, and at the same time including an intermediate step of ejecting an addendum part over the initial tooth profile by cold forging.Type: ApplicationFiled: October 15, 2004Publication date: September 6, 2007Applicant: KONDO SEIKO CO., LTD.Inventor: Keiji Tanabe
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Patent number: 6049898Abstract: A failure-data storage system is disclosed which is able to prepare data accumulated from a multiple data bit device test. Failure-data from the memory tester 1 is, before being stored in memory IC 6, logically added to one previous cycle failure-data with the same address by OR gate 12, and the result is input to F/F 13. The output of the F/F 13 is input to memory IC 6 when 3 state buffer 14 is in an enabled state and is fed back to the OR gate 12. Furthermore, each of the data bit of memory IC has data controller 10-1, 10-2, 10-3, and 10-4 as explained above.Type: GrantFiled: February 25, 1998Date of Patent: April 11, 2000Assignee: Ando Electric Co., Ltd.Inventors: Yuji Sugiyama, Keiji Tanabe
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Patent number: 5535353Abstract: An address generating circuit for data compression includes an X-address generating circuit (10), a Y-address generating circuit (20), an XY-address generation control circuit (30) and a defect analyzing memory (40). Each of the circuits (10) and (20) include a flip-flop (3A), a selector (2), an upcounter (4), an adder (5), a down-counter (6) and a comparator (1). The control circuit (30) receives address end signals J and address carry signals L from the circuits (10) and (20) to control the circuits (10) and (20). The memory (40) has address signals K from the circuits (10) and (20). Processing time required to check defects of a large capacity memory device is reduced because address generators are provided not only on the X-address side but also on the Y-address side and the compression ratio is set in the address generating circuit, thereby accelerating the defect analysis.Type: GrantFiled: June 8, 1993Date of Patent: July 9, 1996Assignee: Ando Electric Co., Ltd.Inventors: Keiji Tanabe, Makoto Kikuchi
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Patent number: 5530805Abstract: A physical image converting circuit is used in a memory tester for or an integrated circuit tester analyzing the failure of storage devices to be measured, in which data are read as logical images from each of the corresponding storage regions to each input/output bit and are stored in each of the corresponding storage regions to each input/output bit of a failure analysis memory used for failure analysis. The physical image converting circuit converts the logical image of the readout data from the failure analysis memory into physical images so that the readout data corresponds to a physical position on a wafer chip of the failure analysis memory. The physical image converting circuit includes a counter, an address converting circuit, a failure analysis memory, and a selector. The counter generates increment addresses corresponding to at least a storage capacity of failure analysis memory.Type: GrantFiled: July 26, 1994Date of Patent: June 25, 1996Assignee: Ando Electric Co., Ltd.Inventor: Keiji Tanabe
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Patent number: 4658770Abstract: A supporting structure for rocker arms for engine valves includes an engine having a cylinder head, a valve provided on the cylinder head and adapted for either of intake and exhaust purposes, a valve-operating mechanism for operating the valve, the valve-operating mechanism including a rocker arm abutting on the top of the valve, to thereby operate the valve, and a pivotal structure for pivotably supporting one end of the rocker arm. The pivotal structure comprises a ball-like portion, a spherical concave portion shaped in a form substantially correspondent to the ball-like portion and engaged with the ball-like portion, and an elastic member disposed at an aperture end of the spherical concave portion and adapted to hold the ball-like portion in the spherical concave portion.Type: GrantFiled: September 27, 1985Date of Patent: April 21, 1987Assignees: Honda Giken Kogyo Kabushiki Kaisha, Tokai TRW and Co., Ltd.Inventors: Takahiro Okuyama, Susumu Toki, Keiji Tanabe