Patents by Inventor Keijirou Itakura
Keijirou Itakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8759931Abstract: A solid-state imaging device includes: a plurality of pixel cells; and column signal lines. Each of the pixel cells includes: a photoelectric conversion film, a pixel electrode, a transparent electrode, an amplifier transistor, a reset transistor, and an address transistor. The solid-state imaging device further includes: a lower-refractive-index transparent layer formed above the transparent electrode; and higher-refractive-index transparent parts embedded in the lower-refractive-index transparent layer and each having a refractive index higher than a refractive index of the lower-refractive-index transparent layer. Each of the higher-refractive-index transparent parts separates light passing through the higher-refractive-index transparent part into zero-order diffracted light, first-order diffracted light, and negative-first-order diffracted light which exit the higher-refractive-index transparent part and travel toward the photoelectric conversion film.Type: GrantFiled: December 17, 2012Date of Patent: June 24, 2014Assignee: Panasonic CorporationInventors: Kimiaki Toshikiyo, Keijirou Itakura
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Patent number: 8605212Abstract: A solid-state image sensing element (1) has a main face provided with an imaging region (1a) in which unit pixels containing photoelectric conversion elements are formed in matrix. Peripheral circuit elements (3, 4) are configured to control imaging operation of the solid-state image sensing element (1) or to perform signal processing of an image output of the solid-state image sensing element (1). The imaging region (1a) is covered with a transparent material (2). The peripheral circuit elements (3, 4) are mounted to a region of the main face of the solid-state image sensing element (1) except for the imaging region (1a) such that main faces of the peripheral circuit elements (3, 4) face the main face of the solid-state image sensing element (1).Type: GrantFiled: June 24, 2011Date of Patent: December 10, 2013Assignee: Panasonic CorporationInventors: Keijirou Itakura, Masayuki Masuyama
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Patent number: 8310581Abstract: A row scanner selects an arbitrary row in an pixel array unit. Per-column AD converters separately convert voltage signals respectively outputted from a column of a plurality of unit pixels in the selected arbitrary row into digital signals. A column scanner sequentially outputs the digital signals by a column-scanning operation thereof. An AD conversion result adjuster judges whether or not the digital signals reach a predetermined judgment value or the status equivalent to the digital signals reaching the predetermined judgment value is generated, and fixes the digital signals to digital pixel values set in accordance with the predetermined judgment value when a result of the judgment is positive.Type: GrantFiled: March 8, 2011Date of Patent: November 13, 2012Assignee: Panasonic CorporationInventors: Keijirou Itakura, Kenichi Shimomura
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Patent number: 8085334Abstract: An imaging apparatus includes: a lens; a solid-state imaging device having, on its top surface, an imaging area in which pixels for converting incident light to a signal are arranged in rows and columns, a vertical scanning circuit located adjacent to the imaging area in a row direction, a peripheral circuit for processing the signal read from the imaging area, and a plurality of terminals; and a prism placed directly on the imaging area for leading the incident light to the imaging area. Light exposure is adjusted by varying brightness of light output from a processor according to a magnitude of the signal output from the solid-state imaging device.Type: GrantFiled: April 28, 2009Date of Patent: December 27, 2011Assignee: Panasonic CorporationInventor: Keijirou Itakura
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Publication number: 20110254988Abstract: A solid-state image sensing element (1) has a main face provided with an imaging region (1a) in which unit pixels containing photoelectric conversion elements are formed in matrix. Peripheral circuit elements (3, 4) are configured to control imaging operation of the solid-state image sensing element (1) or to perform signal processing of an image output of the solid-state image sensing element (1). The imaging region (1a) is covered with a transparent material (2). The peripheral circuit elements (3, 4) are mounted to a region of the main face of the solid-state image sensing element (1) except for the imaging region (1a) such that main faces of the peripheral circuit elements (3, 4) face the main face of the solid-state image sensing element (1).Type: ApplicationFiled: June 24, 2011Publication date: October 20, 2011Applicant: Panasonic CorporationInventors: Keijirou ITAKURA, Masayuki Masuyama
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Publication number: 20110157442Abstract: A row scanner selects an arbitrary row in an pixel array unit. Per-column AD converters separately convert voltage signals respectively outputted from a column of a plurality of unit pixels in the selected arbitrary row into digital signals. A column scanner sequentially outputs the digital signals by a column-scanning operation thereof. An AD conversion result adjuster judges whether or not the digital signals reach a predetermined judgment value or the status equivalent to the digital signals reaching the predetermined judgment value is generated, and fixes the digital signals to digital pixel values set in accordance with the predetermined judgment value when a result of the judgment is positive.Type: ApplicationFiled: March 8, 2011Publication date: June 30, 2011Applicant: PANASONIC CORPORATIONInventors: Keijirou Itakura, Kenichi Shimomura
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Patent number: 7924335Abstract: A row scanner selects an arbitrary row in an pixel array unit. Per-column AD converters separately convert voltage signals respectively outputted from a column of a plurality of unit pixels in the selected arbitrary row into digital signals. A column scanner sequentially outputs the digital signals by a column-scanning operation thereof. An AD conversion result adjuster judges whether or not the digital signals reach a predetermined judgment value or the status equivalent to the digital signals reaching the predetermined judgment value is generated, and fixes the digital signals to digital pixel values set in accordance with the predetermined judgment value when a result of the judgment is positive.Type: GrantFiled: July 23, 2008Date of Patent: April 12, 2011Assignee: Panasonic CorporationInventors: Keijirou Itakura, Kenichi Shimomura
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Patent number: 7898589Abstract: A drive unit 120 sets a saturation amount in a read period in which charges generated in pixels are read to vertical CCDs to be lower in a combination mode than in an individual mode (see Vsub in count values 22 to 24 in FIG. 6). As a result, excess charges in the pixels are drained to an n-type substrate 11. The drive unit 120 also sets an accumulation period to be shorter in combination mode than in individual mode (see Vsub in each mode in FIG. 6).Type: GrantFiled: September 30, 2004Date of Patent: March 1, 2011Assignee: Panasonic CorporationInventors: Shinji Yamamoto, Toshiya Fujii, Kazuyuki Inokuma, Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu
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Patent number: 7884872Abstract: A driving method is applied to a solid-state imaging apparatus having photoelectric conversion portions, transfer portion for reading out signal charges, and an excess charge draining portion for draining charges exceeding a saturation charge amount that is set by a reference voltage. One of driving modes is selected from a full pixel mode in which accumulated signal charges are detected individually for each pixel and a pixel mixing mode in which signal charges of a predetermined number of pixels are mixed to be detected. In the full pixel mode, the draining portion is supplied with the reference voltage having the same value during a charge accumulation period and a read transfer period for read transferring charges. In the pixel mixing mode, the draining portion is supplied with the reference voltage having a low level during the charge accumulation period and the reference voltage having a high level during the read transfer period.Type: GrantFiled: July 10, 2006Date of Patent: February 8, 2011Assignee: Panasonic CorporationInventors: Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu, Yoshiaki Kato
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Publication number: 20110019054Abstract: As nonvolatile memory is integrated on a substrate on which a solid-state image sensor device including: photoelectric converters arranged in rows and columns; vertical CCDs configured to transfer signal charge output from the photoelectric converters in the column direction; and a horizontal CCD configured to transfer signal charge output from the vertical CCDs in the row direction and output the signal charge as a video signal. The nonvolatile memory stores individual difference information indicating individual differences in dependence of saturation performance on a substrate voltage in the solid-state image sensor device, and outputs the stored individual difference information to the outside.Type: ApplicationFiled: October 7, 2010Publication date: January 27, 2011Applicant: PANASONIC CORPORATIONInventor: Keijirou ITAKURA
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Publication number: 20100214462Abstract: A frame rate is improved in accordance with the number of times pixels are summed without increasing an operating frequency of a column scanning circuit, when pixel summation is performed between columns. According to the invention, a row scanner selectively controls unit pixels of a pixel array unit on a row-by-row basis. A column-by-column AD converter is provided in each of columns in the pixel array unit and converts an analog signal of each of the pixels in the rows selected by the row scanner into a digital signal. A column-by-column summer is provided in each of the columns and sums the digital signal of each of the pixels in the rows selected by the row scanner on a column-by-column basis. An input-output selector is provided between the column-by-column AD converters and the column-by-column summers, and selects the column-by-column AD converter of any arbitrary column as an input destination, while selecting the column-by-column summer of any arbitrary column as an output destination.Type: ApplicationFiled: January 17, 2008Publication date: August 26, 2010Inventor: Keijirou Itakura
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Publication number: 20100053402Abstract: An imaging apparatus includes: a lens; a solid-state imaging device having, on its top surface, an imaging area in which pixels for converting incident light to a signal are arranged in rows and columns, a vertical scanning circuit located adjacent to the imaging area in a row direction, a peripheral circuit for processing the signal read from the imaging area, and a plurality of terminals; and a prism placed directly on the imaging area for leading the incident light to the imaging area. Light exposure is adjusted by varying brightness of light output from a processor according to a magnitude of the signal output from the solid-state imaging device.Type: ApplicationFiled: April 28, 2009Publication date: March 4, 2010Inventor: Keijirou ITAKURA
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Publication number: 20090027533Abstract: A row scanner selects an arbitrary row in an pixel array unit. Per-column AD converters separately convert voltage signals respectively outputted from a column of a plurality of unit pixels in the selected arbitrary row into digital signals. A column scanner sequentially outputs the digital signals by a column-scanning operation thereof. An AD conversion result adjuster judges whether or not the digital signals reach a predetermined judgment value or the status equivalent to the digital signals reaching the predetermined judgment value is generated, and fixes the digital signals to digital pixel values set in accordance with the predetermined judgment value when a result of the judgment is positive.Type: ApplicationFiled: July 23, 2008Publication date: January 29, 2009Inventors: Keijirou ITAKURA, Kenichi Shimomura
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Patent number: 7483063Abstract: An image defect correction apparatus that processes luminance signals output from two-dimensionally arranged light-sensitive elements via a plurality of vertical charge coupled devices and a horizontal charge coupled device in a predetermined order, outputs image information, and includes: a recording unit that records therein an X address for identifying a correction-target vertical line of pixels corresponding to a vertical charge coupled device in which a point defect exists; a correction value calculating unit that calculates a correction value from values of (i) a luminance signal corresponding to at least one pixel at a predetermined position on the correction-target vertical line identified by the X address and (ii) a luminance signal corresponding to at least one pixel at a predetermined position on another vertical line; and a correcting unit that corrects values of luminance signals corresponding to the correction-target vertical line, based on the calculated correction value.Type: GrantFiled: May 14, 2004Date of Patent: January 27, 2009Assignee: Panasonic CorporationInventors: Keijirou Itakura, Toshiya Fujii, Akiyoshi Kohno, Yoshiaki Kato
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Patent number: 7471322Abstract: A solid state imaging device of the present invention comprises a solid state imaging element which includes a plurality of photoelectric conversion elements arranged in a matrix. In the solid state imaging device of the present invention, a pixel mixture unit area includes q pixels (q is a natural number equal to or greater than 2) in the first direction of the solid state imaging element and p pixels (p is a natural number equal to or greater than 2) in the second direction that crosses the first direction.Type: GrantFiled: January 19, 2005Date of Patent: December 30, 2008Assignee: Panasonic CorporationInventors: Izumi Shimizu, Toshiya Fujii, Kunihiro Imamura, Keijirou Itakura
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Publication number: 20070023785Abstract: A driving method is applied to a solid-state imaging apparatus having photoelectric conversion portions, transfer portion for reading out signal charges, and an excess charge draining portion for draining charges exceeding a saturation charge amount that is set by a reference voltage. One of driving modes is selected from a full pixel mode in which accumulated signal charges are detected individually for each pixel and a pixel mixing mode in which signal charges of a predetermined number of pixels are mixed to be detected. In the full pixel mode, the draining portion is supplied with the reference voltage having the same value during a charge accumulation period and a read transfer period for read transferring charges. In the pixel mixing mode, the draining portion is supplied with the reference voltage having a low level during the charge accumulation period and the reference voltage having a high level during the read transfer period.Type: ApplicationFiled: July 10, 2006Publication date: February 1, 2007Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu, Yoshiaki Kato
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Publication number: 20060170805Abstract: In a CCD solid-state image pick-up device according to the present invention, a solid-state image pick-up circuit formed by a sensor part, a horizontal transfer register part and a floating diffusion amplifier converts a photo signal into a voltage signal and outputs the voltage signal, and a voltage-current conversion circuit converts the voltage signal output from the solid-state image pick-up circuit into a current signal. A current-driven black signal component detect/remove circuit then removes a black signal component from the current signal output from the CCD solid-state image pick-up device, and an image signal component alone is output as a current image signal. A current-voltage conversion circuit converts the current image signal into a voltage image signal.Type: ApplicationFiled: January 31, 2006Publication date: August 3, 2006Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Takayasu Kito, Shinichi Ogita, Kouji Yamaguchi, Naohisa Hatani, Keijirou Itakura, Mitsuhiko Otani, Yasumasa Yoshikawa
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Publication number: 20050157191Abstract: A solid state imaging device of the present invention comprises a solid state imaging element which includes a plurality of photoelectric conversion elements arranged in a matrix. In the solid state imaging device of the present invention, a pixel mixture unit area includes q pixels (q is a natural number equal to or greater than 2) in the first direction of the solid state imaging element and p pixels (p is a natural number equal to or greater than 2) in the second direction that crosses the first direction.Type: ApplicationFiled: January 19, 2005Publication date: July 21, 2005Inventors: Izumi Shimizu, Toshiya Fujii, Kunihiro Imamura, Keijirou Itakura
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Publication number: 20050062857Abstract: A drive unit 120 sets a saturation amount in a read period in which charges generated in pixels are read to vertical CCDs to be lower in a combination mode than in an individual mode (see Vsub in count values 22 to 24 in FIG. 6). As a result, excess charges in the pixels are drained to an n-type substrate 11. The drive unit 120 also sets al accumulation period to be shorter in combination mode than in individual mode (see Vsub in each mode in FIG. 6).Type: ApplicationFiled: September 30, 2004Publication date: March 24, 2005Inventors: Shinji Yamamoto, Toshiya Fujii, Kazuyuki Inokuma, Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu
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Publication number: 20040263649Abstract: An image defect correction apparatus that processes luminance signals output from two-dimensionally arranged light-sensitive elements via a plurality of vertical charge coupled devices and a horizontal charge coupled device in a predetermined order, outputs image information, and includes: a recording unit that records therein an X address for identifying a correction-target vertical line of pixels corresponding to a vertical charge coupled device in which a point defect exists; a correction value calculating unit that calculates a correction value from values of (i) a luminance signal corresponding to at least one pixel at a predetermined position on the correction-target vertical line identified by the X address and (ii) a luminance signal corresponding to at least one pixel at a predetermined position on another vertical line; and a correcting unit that corrects values of luminance signals corresponding to the correction-target vertical line, based on the calculated correction value.Type: ApplicationFiled: May 14, 2004Publication date: December 30, 2004Inventors: Keijirou Itakura, Toshiya Fujii, Akiyoshi Kohno, Yoshiaki Kato