Patents by Inventor Keiko Asakawa

Keiko Asakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6562680
    Abstract: A method of manufacturing a semiconductor device comprising the steps of: (a) depositing a gate insulating film, a floating gate silicon film, an insulating film between gates, and a control gate silicon film in this order on a silicon substrate and forming thereon a third insulating film; (b) etching said films until the silicon substrate is exposed to form a gate electrode and to open regions for a source and a drain; (c) removing the third insulating film while leaving it on one end or both ends of the gate electrode in the direction of channel length so that the control gate silicon film is partially exposed; (d) forming sidewall spacers on sidewalls of the gate electrode and the third insulating film remaining on the gate electrode; (e) depositing a refractory metal film over the entire surface; and (f) performing a thermal treatment for simultaneous silicidation of the refractory metal film with the exposed control gate silicon film and the silicon substrate to form a metal silicide layer on each of the
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: May 13, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Keiko Asakawa