Patents by Inventor Keiko Mushiake

Keiko Mushiake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Design support system and design support method for multi-chip package
    Publication number: 20020152055
    Abstract: A design support system includes an information merging section, a connection information generating section and an inter-semiconductor chip and lead frame connection information integrating section. The information merging section captures semiconductor chip information and lead frame information, and generates semiconductor chip and lead frame merged information for each of semiconductor chips. The connection information generating section generates connection information between the semiconductor chips and lead frame from the semiconductor chip and lead frame merged information generated by the information merging section.
    Type: Application
    Filed: November 9, 2001
    Publication date: October 17, 2002
    Inventors: Toshiaki Ito, Hirotaka Ito, Hideki Takeuchi, Yoshihiro Ueda, Akiko Yamada, Keiko Mushiake