Patents by Inventor Keiko Nishitsuji

Keiko Nishitsuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7956473
    Abstract: Method of manufacturing semiconductor device including forming inter-layer insulating film on semiconductor substrate. First metal film is formed on inter-layer insulating film. First resist is formed on first metal film and patterned. Anisotropic etching performed on first metal film using first resist as mask. First resist is removed and second metal film is formed on inter-layer insulating film to cover remaining first metal film. Second resist is formed on second metal film in area where first metal film exists on inter-layer insulating film and part of area where first metal film does not exist. Anisotropic etching is performed on second metal film using second resist as mask and bonding pad having first metal film and second metal film, and upper layer wiring having second metal film and not first metal film. Second resist is removed. Surface protection film covering bonding pad is formed. Pad opening is formed on bonding pad.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Momono, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki
  • Publication number: 20090026635
    Abstract: A method of manufacturing a semiconductor device comprises: a step of forming an inter-layer insulating film on a semiconductor substrate; a step of forming a first metal film on the inter-layer insulating film; a step of forming a first resist on the first metal film and patterning the first resist; a step of performing anisotropic etching on the first metal film using the first resist as a mask; a step of removing the first resist; a step of forming a second metal film on the inter-layer insulating film so as to cover the remaining first metal film; a step of forming a second resist on the second metal film in an area where the first metal film exists on the inter-layer insulating film and part of an area where the first metal film does not exist; a step of performing anisotropic etching on the second metal film using the second resist as a mask and forming a bonding pad having the first metal film and the second metal film and an upper layer wiring which has the second metal film, yet not the first metal f
    Type: Application
    Filed: July 23, 2008
    Publication date: January 29, 2009
    Inventors: Hiroyuki MOMONO, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki