Patents by Inventor Keiko Sakuma

Keiko Sakuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11871557
    Abstract: A semiconductor device according to the embodiment includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode opposed to the oxide semiconductor layer; a gate insulating layer provided between the oxide semiconductor layer and the gate electrode; a first insulating layer provided between the gate electrode and the first electrode; and a second insulating layer provided between the gate electrode and the second electrode and having an oxygen atom concentration lower than an oxygen atom concentration of the first insulating layer.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: January 9, 2024
    Assignee: Kioxia Corporation
    Inventors: Taro Shiokawa, Kiwamu Sakuma, Keiko Sakuma
  • Publication number: 20230422484
    Abstract: According to one embodiment, a semiconductor device includes a first insulating layer, a gate electrode layer provided on the first insulating layer, a second insulating layer provided on the gate electrode layer, an oxide semiconductor layer provided along the second insulating layer, the gate electrode layer and the first insulating layer, a gate insulating layer provided along the second insulating layer, the gate electrode layer and the first insulating layer, and surrounding a side surface of the oxide semiconductor layer, and a first hydrogen barrier film surrounding the oxide semiconductor layer and the gate insulating layer.
    Type: Application
    Filed: November 10, 2022
    Publication date: December 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Tatsuki KIKUCHI, Keiko SAKUMA, Shosuke FUJII
  • Publication number: 20230299206
    Abstract: A semiconductor device includes: a first electrode; a second electrode; a first oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode around the first oxide semiconductor layer; a second oxide semiconductor layer provided between the gate electrode and the first oxide semiconductor layer, and separated from the first electrode; and a gate insulating layer provided between the gate electrode and the second oxide semiconductor layer.
    Type: Application
    Filed: August 31, 2022
    Publication date: September 21, 2023
    Applicant: Kioxia Corporation
    Inventors: Keiko SAKUMA, Taro SHIOKAWA, Kiwamu SAKUMA
  • Publication number: 20230197857
    Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the first electrode and the second electrode and including a first region surrounded by the first electrode in a plane perpendicular to a first direction from the first electrode toward the second electrode; a gate electrode facing the oxide semiconductor layer; a gate insulating layer; a first insulating layer between the gate electrode and the first electrode; and a second insulating layer between the gate electrode and the second electrode. A first maximum distance between a first portion of the first electrode and a second portion of the first electrode in a second direction in a cross section parallel to the first direction is larger than a minimum distance between a third portion of the first insulating layer and a fourth portion of the first insulating layer in the second direction.
    Type: Application
    Filed: June 16, 2022
    Publication date: June 22, 2023
    Applicant: Kioxia Corporation
    Inventors: Taro SHIOKAWA, Kiwamu SAKUMA, Keiko SAKUMA, Mutsumi OKAJIMA, Kazuhiro MATSUO, Masaya TODA
  • Publication number: 20230103593
    Abstract: A transistor includes an upper electrode; a lower electrode; a gate electrode disposed between the upper electrode and the lower electrode; and a columnar portion penetrating the gate electrode and provided between the upper electrode and the lower electrode. The columnar portion includes a tubular gate insulating film and a semiconductor layer, the tubular gate insulating film disposed at a first distance away from the upper electrode and in contact with the gate electrode. The semiconductor layer is embedded in the tubular gate insulating film and between the gate insulating film and the upper electrode and in contact with the upper electrode.
    Type: Application
    Filed: March 3, 2022
    Publication date: April 6, 2023
    Inventors: Kiwamu SAKUMA, Taro SHIOKAWA, Keiko SAKUMA
  • Publication number: 20230088455
    Abstract: A semiconductor device according to the embodiment includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode opposed to the oxide semiconductor layer; a gate insulating layer provided between the oxide semiconductor layer and the gate electrode; a first insulating layer provided between the gate electrode and the first electrode; and a second insulating layer provided between the gate electrode and the second electrode and having an oxygen atom concentration lower than an oxygen atom concentration of the first insulating layer.
    Type: Application
    Filed: March 9, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Taro Shiokawa, Kiwamu Sakuma, Keiko Sakuma
  • Patent number: 11437403
    Abstract: Provided is a storage device according to an embodiment including: a stacked body including gate electrode layers stacked in a first direction; a semiconductor layer provided in the stacked body and extending in the first direction; and a gate insulating film provided between the semiconductor layer and the gate electrode layer, the gate insulating film having a first region disposed between the gate electrode layer and the semiconductor layer and a second region disposed between the two first regions adjacent to each other in the first direction, the gate insulating film containing a hafnium oxide, in which a first thickness of the first region in the second direction from the semiconductor layer toward the gate electrode layer is smaller than a second thickness of the second region in the second direction.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: September 6, 2022
    Assignee: Kioxia Corporation
    Inventors: Keiko Sakuma, Akio Kaneko, Hidenori Miyagawa, Yuuichi Kamimuta
  • Publication number: 20210082957
    Abstract: Provided is a storage device according to an embodiment including: a stacked body including gate electrode layers stacked in a first direction; a semiconductor layer provided in the stacked body and extending in the first direction; and a gate insulating film provided between the semiconductor layer and the gate electrode layer, the gate insulating film having a first region disposed between the gate electrode layer and the semiconductor layer and a second region disposed between the two first regions adjacent to each other in the first direction, the gate insulating film containing a hafnium oxide, in which a first thickness of the first region in the second direction from the semiconductor layer toward the gate electrode layer is smaller than a second thickness of the second region in the second direction.
    Type: Application
    Filed: June 16, 2020
    Publication date: March 18, 2021
    Applicant: Kioxia Corporation
    Inventors: Keiko SAKUMA, Akio Kaneko, Hidenori Miyagawa, Yuuichi Kamimuta
  • Patent number: 4980300
    Abstract: When a surface of semiconductor wafer is treated for gettering, ultrasonic waves are caused to propagate along the surface of the semiconductor wafer, through pure water. Mechanical damages are formed on the surface of the semiconductor wafer along which the ultrasonic waves propagated, the damages serving as a back side damage.
    Type: Grant
    Filed: November 25, 1988
    Date of Patent: December 25, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Moriya Miyashita, Shintaro Yoshii, Keiko Sakuma