Abstract: A storage device comprising a storage including a first pool area providing a physical area in units of first chunks of first size, and a second pool area providing a physical area in units of second chunks of second size smaller than the first size, and a controller. The controller counts a first count value indicating a number of first divided areas in which data is stored from among a plurality of the first divided areas obtained by dividing, by the second size, a virtual volume that has the first chunk allocated only to an area in which data is stored. In a case where a ratio of the first count value to a number of the first chunks allocated to the virtual volume is equal to or less than a first threshold, allocate the second chunk instead of the first chunk to the virtual volume.

Abstract: A storage system includes: a first storage control device; and a second storage control device, wherein, when receiving a switching instruction to switch a device in charge that controls the I/O processing for the logical storage area from the first storage control device to the second storage control device, the first storage control device performs first switching processing of notifying the second storage control device of a management device number that indicates the first storage control device as a device that manages the cache, and executing response processing to switch the device in charge, and when receiving a determination request as to whether data requested to be read from the logical storage area by a readout request hits the cache, the first storage control device determines whether the data hits the cache, and the second storage control device transmits the determination request to the first storage control device.

Abstract: A storage control device includes: an auxiliary cache memory that is a nonvolatile memory; a volatile memory; and a processor configured to execute a saving control process after a predetermined failure occurs, the saving control process being configured to (a) cause a writing control process to stop writing of data stored in the auxiliary cache memory to the storage medium, (b) secure, in the auxiliary cache memory, a storage region for storing the management information of the volatile memory, (c) generate a copy of management information of the volatile memory in the storage region, and (d) cause the writing control process to execute control to write first data stored in the volatile memory to the auxiliary cache memory or the storage medium based on the management information of the auxiliary cache memory.

Abstract: An immunostimulator that comprises a compound represented by general formula I (wherein n stands for an integer of 4-12) or a pharmacologically acceptable salt thereof as an active ingredient.

Abstract: A storage control device includes: an auxiliary cache memory that is a nonvolatile memory; a volatile memory; and a processor configured to execute a saving control process after a predetermined failure occurs, the saving control process being configured to (a) cause a writing control process to stop writing of data stored in the auxiliary cache memory to the storage medium, (b) secure, in the auxiliary cache memory, a storage region for storing the management information of the volatile memory, (c) generate a copy of management information of the volatile memory in the storage region, and (d) cause the writing control process to execute control to write first data stored in the volatile memory to the auxiliary cache memory or the storage medium based on the management information of the auxiliary cache memory.

Abstract: A storage control device includes a processor configured to receive access information indicating a start position and an end position of an access area in a first volume. The processor is configured to determine, based on one or more pieces of the received access information, whether a number of blocks in a cache area is reduced as a whole by changing a position of data in the first volume. The blocks are used in response to an access to the access area and correspond to one or more unit areas in the first volume. The one or more unit areas include the access area. The processor is configured to change the position of the data in the first volume upon determining that the number of the blocks in the cache area is reduced as a whole by changing the position of the data in the first volume.

Abstract: A memory includes a plurality of pages used as a cache area. A processor allocates a first storage resource to a first link indicating a first page group of the plurality of pages, and a second storage resource to a second link indicating a second page group of the plurality of pages. The processor uses the first and the second links, and processes access requests for accessing to the first and the second storage resources, in parallel.

Abstract: A storage control device includes a processor configured to receive from a host device a write request for writing data into a memory device. The processor is configured to try to write the data into a cache memory. The processor is configured to select an operation mode of a write process for the write request from among a first mode and a second mode on the basis of whether a cache hit or a cache miss occurs at the trial. The processor is configured to return a response to the host device upon completion of writing the data into the cache memory without waiting for completion of the write process when the write process is performed in the first mode. The processor is configured to return a response to the host device upon completion of the write process when the write process is performed in the second mode.

Abstract: A memory includes a plurality of pages used as a cache area. A processor allocates a first storage resource to a first link indicating a first page group of the plurality of pages, and a second storage resource to a second link indicating a second page group of the plurality of pages. The processor uses the first and the second links, and processes access requests for accessing to the first and the second storage resources, in parallel.

Abstract: A storage control device includes a processor configured to receive access information indicating a start position and an end position of an access area in a first volume. The processor is configured to determine, based on one or more pieces of the received access information, whether a number of blocks in a cache area is reduced as a whole by changing a position of data in the first volume. The blocks are used in response to an access to the access area and correspond to one or more unit areas in the first volume. The one or more unit areas include the access area. The processor is configured to change the position of the data in the first volume upon determining that the number of the blocks in the cache area is reduced as a whole by changing the position of the data in the first volume.

Abstract: A storage control device includes a processor configured to receive from a host device a write request for writing data into a memory device. The processor is configured to try to write the data into a cache memory. The processor is configured to select an operation mode of a write process for the write request from among a first mode and a second mode on the basis of whether a cache hit or a cache miss occurs at the trial. The processor is configured to return a response to the host device upon completion of writing the data into the cache memory without waiting for completion of the write process when the write process is performed in the first mode. The processor is configured to return a response to the host device upon completion of the write process when the write process is performed in the second mode.