Abstract: Disclosed is a manufacturing method for forming a FET on a glass substrate at low temperatures. A polycrystalline silicon layer 2 is formed on a glass substrate 1, germanium layers 11, 12 are formed on the polycrystalline silicon layer in regions that are to become a source and a drain, ions serving as a dopant are implanted into at least the germanium layers, and annealing is subsequently applied to thereby cause the implanted dopant to diffuse into the polycrystalline. silicon layer, form a source region S and a drain region D and crystallize the germanium layers. Alternatively, the dopant is implanted also into the polycrystalline silicon layer at such a dosage that will not cause the polycrystalline silicon layer to become amorphous. Annealing for crystallizing the germanium is subsequently carried out. Annealing may be performed in the neighborhood of 500° C.