Patents by Inventor Keisuke Harada

Keisuke Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070069647
    Abstract: An electrodeless discharge lamp comprising: an airtight container bulb made of a transparent material and enclosing a discharge gas; and a coupler (coil assembly body), contained in a cavity formed in the bulb, for generating a high frequency electromagnetic field by conducting a high frequency current in a coil to excite the discharge gas so as to emit light, wherein the coupler comprises: a pipe-shaped cylinder formed of a thermal conductor for heat release; a skeleton-shaped bobbin mounted on an outer surface of the cylinder along an axial direction of the cylinder; a core made of a soft magnetic material provided at an opening formed by the skeleton of the bobbin and being in substantial surface contact with the cylinder; and a coil wound around a surface of the skeleton-shaped bobbin and the core.
    Type: Application
    Filed: October 24, 2003
    Publication date: March 29, 2007
    Applicant: MATSUSHITA ELECTRIC WORKS, LTD.
    Inventors: Hidenori Kakehashi, Shohei Yamamoto, Koji Hiramatsu, Shinji Hizuma, Keisuke Harada, Yoshinobu Shibata
  • Patent number: 7136584
    Abstract: An optical amplifier to which an optical output power automatic attenuation circuit according to the present invention is applied, comprises: one amplifier board to and from which a WDM light is input and output; and a plurality of booster boards which supply pumping lights to the amplifier board, an ID pattern generated in an ID pattern generating circuit disposed in each of the booster boards is superposed on the pumping light to be sent to the amplifier board, an electric signal indicating a monitoring result of the pumping light in a light receiver disposed on the amplifier board is transmitted to each of the booster boards, it is detected in an ID coincidence detection circuit in each of the booster boards whether or not a received ID pattern contained in the electric signal is coincident with the generated ID pattern, and a connection condition of an output fiber is judged according to the detection result so that an output level of the pumping light is controlled.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: November 14, 2006
    Assignee: Fujitsu Limited
    Inventors: Keisuke Harada, Yoshitaka Eguchi, Satoru Miyazaki, Hiroshi Oikawa
  • Publication number: 20060098270
    Abstract: An optical amplifier to which an optical output power automatic attenuation circuit according to the present invention is applied, comprises: one amplifier board to and from which a WDM light is input and output; and a plurality of booster boards which supply pumping lights to the amplifier board, an ID pattern generated in an ID pattern generating circuit disposed in each of the booster boards is superposed on the pumping light to be sent to the amplifier board, an electric signal indicating a monitoring result of the pumping light in a light receiver disposed on the amplifier board is transmitted to each of the booster boards, it is detected in an ID coincidence detection circuit in each of the booster boards whether or not a received ID pattern contained in the electric signal is coincident with the generated ID pattern, and a connection condition of an output fiber is judged according to the detection result so that an output level of the pumping light is controlled.
    Type: Application
    Filed: March 22, 2005
    Publication date: May 11, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Keisuke Harada, Yoshitaka Eguchi, Satoru Miyazaki, Hiroshi Oikawa
  • Patent number: 6115435
    Abstract: When the received symbol is located (FIG. 4) within one of regions G, H, I, L, M, N, Q, R, and S, 2 bits are decided to be most reliable to obtain their soft decision values=0 or 7. As for the remaining 2 bits, a soft decision value=0 to 7 is decided by soft decision in the I- or Q-axis direction. When the received symbol is located within one of regions A, E, U, and Y, all the 4 bits are decided to obtain their soft decision values=0 or 7. When the received symbol is located with one of regions B, C, D, F, J, K, 0, P, T, V, W, and X, 3 bits are decided to be most reliable to obtain their soft decision values=0 or 7. As for the remaining 1 bit, a soft decision value=0 to 7 is obtained by soft decision in the I- or Q-axis direction. A soft decision method that can implement soft decision in multilevel (amplitude and/or phase) modulation and can fully exhibit the correction performance of maximum likelihood coding can be provided.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: September 5, 2000
    Assignees: Advanced Digital Television Broadcasting Laboratory, Kabushiki Kaisha Toshiba
    Inventors: Keisuke Harada, Masami Aizawa, Rumi Tanabe