Patents by Inventor Keisuke Kadowaki

Keisuke Kadowaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10833666
    Abstract: A voltage proportional to a pulse width modulation (PWM) duty cycle is generated, using a low pass filter (LPF). A 2nd or higher order LPF is provided, giving a 90×(2n+1) degree phase shift for (n=0, 1, 2, . . . ), so that the sampling timing at the latter stages can be at the rising and/or falling edge of the PWM input signal. A switched capacitor circuit after the 2nd or higher order LPF is provided, removing a voltage ripple on an LPF output, and using a smaller device area.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: November 10, 2020
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Keisuke Kadowaki, Naoyuki Unno, Hiromitsu Aoyama
  • Patent number: 9917501
    Abstract: A semiconductor device includes a plurality of transistors, each having a gate electrode including extending portions having a length obtained by dividing the gate electrode causing interruption to switching at a desired frequency, wherein current inflow terminals of the plurality of transistors are connected to each other and current outflow terminals of the plurality of transistors are connected to each other.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: March 13, 2018
    Assignee: Rohm Co., Ltd.
    Inventor: Keisuke Kadowaki
  • Patent number: 9847779
    Abstract: In a dead time adjusting circuit, a switch voltage appearing at a connection node between a first output switch and a second output switch, which are connected in series between two different potentials, is monitored to detect a first dead time, which is from a time at which the second output switch is turned off to a time at which the first output switch is turned on, and a second dead time, which is from a time at which the first output switch is turned off to a time at which the second output switch is turned on, each of the first and second dead times being feedback-controlled to be identical to a predetermined target value.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: December 19, 2017
    Assignee: Rohm Co., Ltd.
    Inventor: Keisuke Kadowaki
  • Publication number: 20160248412
    Abstract: In a dead time adjusting circuit, a switch voltage appearing at a connection node between a first output switch and a second output switch, which are connected in series between two different potentials, is monitored to detect a first dead time, which is from a time at which the second output switch is turned off to a time at which the first output switch is turned on, and a second dead time, which is from a time at which the first output switch is turned off to a time at which the second output switch is turned on, each of the first and second dead times being feedback-controlled to be identical to a predetermined target value.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 25, 2016
    Inventor: Keisuke Kadowaki
  • Publication number: 20160248326
    Abstract: A semiconductor device includes a plurality of transistors, each having a gate electrode including extending portions having a length obtained by dividing the gate electrode causing interruption to switching at a desired frequency, wherein current inflow terminals of the plurality of transistors are connected to each other and current outflow terminals of the plurality of transistors are connected to each other.
    Type: Application
    Filed: February 17, 2016
    Publication date: August 25, 2016
    Inventor: Keisuke Kadowaki
  • Patent number: 8817683
    Abstract: In a network relay router 10, a multicast routing protocol processing module 11A sequentially sends a join request message (CP1) to a router 30a functioning as a rendezvous point via an interface 101, based on the settings of a multicast group address or destination address and a sender VRF name. The network relay router 10 receives a multicast packet (DP1) from the router 30a via the interface 101 and acquires a sender address or source address of a transmission device SE from the received multicast packet. The network relay router 10 sends a join request message (CP2) via an interface 102 on the side of the transmission device SE and receives a multicast packet via the interface 102. This establishes an optimum multicast route (MR) between the transmission device SE and the network relay router 10.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: August 26, 2014
    Assignee: Alaxala Networks Corporation
    Inventors: Toshiyuki Kubo, Keisuke Kadowaki, Nagayuki Hirota, Hidehiro Fukushima
  • Patent number: 8324875
    Abstract: A multiphase DC/DC converter according to the present invention includes: a plurality of DC/DC converters whose outputs are connected in common to supply electric power to a load; a load state detection portion which detects a state of the load connected to the plurality of DC/DC converters and outputs a detection result; and a control circuit which drives each of the plurality of DC/DC converters based on outputs from the plurality of DC/DC converters, and based on an output from the load state detection portion, drives the plurality of DC/DC converters with output phases of the plurality of DC/DC converters deviated from each other or with the output phases of the plurality of DC/DC converters aligned with each other.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: December 4, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Tomoyuki Miki, Koji Nishikawa, Keisuke Kadowaki
  • Publication number: 20100303073
    Abstract: In a network relay router 10, a multicast routing protocol processing module 11A sequentially sends a join request message (CP1) to a router 30a functioning as a rendezvous point via an interface 101, based on the settings of a multicast group address or destination address and a sender VRF name. The network relay router 10 receives a multicast packet (DP1) from the router 30a via the interface 101 and acquires a sender address or source address of a transmission device SE from the received multicast packet. The network relay router 10 sends a join request message (CP2) via an interface 102 on the side of the transmission device SE and receives a multicast packet via the interface 102. This establishes an optimum multicast route (MR) between the transmission device SE and the network relay router 10.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 2, 2010
    Applicant: ALAXALA NETWORKS CORPORATION
    Inventors: Toshiyuki KUBO, Keisuke KADOWAKI, Nagayuki HIROTA, Hidehiro FUKUSHIMA
  • Publication number: 20100109622
    Abstract: A multiphase DC/DC converter according to the present invention includes: a plurality of DC/DC converters whose outputs are connected in common to supply electric power to a load; a load state detection portion which detects a state of the load connected to the plurality of DC/DC converters and outputs a detection result; and a control circuit which drives each of the plurality of DC/DC converters based on outputs from the plurality of DC/DC converters, and based on an output from the load state detection portion, drives the plurality of DC/DC converters with output phases of the plurality of DC/DC converters deviated from each other or with the output phases of the plurality of DC/DC converters aligned with each other.
    Type: Application
    Filed: October 29, 2009
    Publication date: May 6, 2010
    Applicant: Rohm Co., Ltd.
    Inventors: Tomoyuki Miki, Koji Nishikawa, Keisuke Kadowaki