Abstract: In a device and system which perform processing (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.

Abstract: There is disclosed an apparatus for expanding, decompressing and editing signals, and particularly disclosed is a signal processing equipment for printing or displaying images. The apparatus comprises compression means for image data, storing means for storing the compression data, decompression means, and editing means for editing, using only signals for edition, wherein the transfer of the data between the means is executed by the compression data.

Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.

Abstract: An image processing apparatus obtains a sum A of image data values of pixels in a template image, a sum B of squares of image data values of pixels in a template image, a sum C of image data values of pixels in a sub-image to be processed, of a search image, a sum D of squares of image data values of pixels in the sub-image of the template image, further obtains a threshold value F in advance by using the obtained values A, B, C and D, the number P of pixels in the template image, and the preset value E. Moreover, the apparatus obtains a square of each difference between an image data value of each pixel in the sub-image and that of a corresponding pixel in the template image, and performs cumulative addition for each obtained squares. If the result of cumulative addition exceeds the above-mentioned threshold value, the apparatus closes processing evaluation of a similarity between the sub-image and the template image.

Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.

Abstract: An image processor which is connected to a system bus that connects a processor for forming graphic command related to image processing to a main memory that holds command and original image data, and draws image on the frame buffer based upon said graphic command from said processor, wherein said graphic processor has a data bus change-over unit which connects said system bus to a first data bus that is connected to a graphic data memory holding said graphic command and said original image data, or connects said first data bus to a frame buffer which holds the data to be displayed. The image processor realizes a high-speed processing at a reduced cost by using a graphic memory bus coupled to a graphic processor.

Abstract: In a device and system which perform processing (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.

Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.

Abstract: In a device and system which perform processing, (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.

Abstract: A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.

Abstract: An image information processor for producing a high-quality output image by emphasizing the contour portions of a character, a photograph and others and by preventing the generation of a Moire patterns in a dot region, for preventing an increase in the amount of codes, and for making it unnecessary to set desired binarization processing for each original, is provided. The processor includes a unit for scanning the original to convert each pixel data into an electric signal, a unit for controlling the start of image processing, a filter for carrying out enhancement processing among a plurality of pixels arranged in oblique directions after smoothing processing has been carried out among a plurality of contiguous pixels arranged in scanning and traverse directions, and a unit for carrying out at least one of binarization and binarization capable of realizing pseudo tone expression.

Abstract: A device for processing values corresponding to measurement of pixels, includes an input inputting a j th primary density information X.sub.j representing density information of the j th pixel of an image, where the j th pixel includes a part which overlaps the previous (j-1)th pixel. A calculator calculates the j th secondary density information .DELTA.X.sub.j which represents the density information of the part of the j th pixel which does not overlap the (j-1)th pixel, on the basis of at least the j th primary density information X.sub.j and of the previously calculated secondary density information. A memory stores at least one of the j th primary density information X.sub.j and the j th secondary density information .DELTA.X.sub.j. The device can be used in a facsimile system and a data processing system.

Abstract: In a high-speed image scanner, a driving method is proposed which needs no timing adjustment between the sensor driving pulse and the motor drive pulse required when the motor shifts from an accelerated state to a constant-speed state. The period of the sensor driving pulse is selected to be equal to or 1/N (N=integer) of that of the motor drive pulse at the time of constant-speed operation, and the phases of the sensor driving pulse and motor drive pulse are controlled independently of each other. Thus, even though the sensor driving pulse and the motor drive pulse are out of good timing, each line of the image can be surely read.

Abstract: An image processing system which can learn user's preference to satisfy him to the full, and also comprises means for inquiring a user about his satisfication degree to enhance it. The image processing system comprises means for learning user's preference such as his manner of setting and pressing a button, a destination, a condition set for copying, and means for changing a control parameter on the basis of the learning result.

Abstract: A facsimile apparatus has a transparent plate on which a document may be located. The document is then scanned by a scanner which includes electronic solid state light generation means e.g. LEDs which illuminate the document, with the light reflected from the document being detected by a detector. An electronic signal corresponding to an image of the document may then be transmitted to a remote location. Alternately, the facsimile apparatus may be used to copy the document. Cut paper sheets are withdrawn from storage and an image printed thereon by a heat transfer system in which a film of ink is selectively heated. Paper on which an image has been printed is then received on the upper surface of the storage. The facsimile apparatus may also have a document transporter for moving a document past the scanner with the scanner fixed.

Abstract: A multi-color document reading apparatus used in a facsimile apparatus for reading a document disposed at a predetermined position containing pictures of multiple colors on a line-by-line basis while discriminately identifying the colors includes an image sensor for sensing optical images in a predetermined area including at least one line of the document disposed at the predetermined position, light sources for selectively illuminating at least the predetermined area in one of first and second energized states differing from each other in respect to the spectral characteristics thereof, a switch circuit for selectively energizing the light sources for illuminating the document in one of the first and second states, a distortion correcting circuit including memories for storing first and second shading waveforms derived from data sensed by the image sensor for optical images of a standard sheet of a specific color disposed at the predetermined position and illuminated by the light source in the first and seco